CDCE913: request schematic review

TS Yang

Genius 4800 points

Part Number: CDCE913
Other Parts Discussed in Thread: CDCE925

Hi,

Could you review below schematic, and please let me know whether there's any potential problem?

Is this output possbile?

thanks,

over 7 years ago

0 Alan O over 7 years ago

TI__Mastermind 32575 points

S0, Vctrl, and CLK inputs are referenced to VDD = 1.8V supply, so do not exceed VDD voltage on these inputs. Add a voltage divider for the 3.3V oscillator output to be compatible with 1.8V input levels.

Alan

0 TS Yang over 7 years ago in reply to Alan O

Genius 4800 points

How about clock? Is it possible from 25Mhz to 66Mhz and 125Mhz?

0 Alan O over 7 years ago in reply to TS Yang

TI__Mastermind 32575 points

No, they cannot generate both 66M and 125M at the same time from a single PLL/VCO since LCM(66.66...M, 125M) = 1000M, which is outside of the VCO tuning range.

They would need to use CDCE925 which has two PLL/VCOs to generate both frequencies simultaneously.

Alan

0 TS Yang over 7 years ago in reply to Alan O

Genius 4800 points

Hi Alan,

thanks for your answer.

We want to configure as below.

a. Y1: 66M
b. Y2: 66M
c. Y3: 100M

After configuring using TI COLDCK PRO tool as below and writing HEX file, Clock is not displayed at all.

What do you think is the problem?

thanks,

0 Alan O over 7 years ago in reply to TS Yang

TI__Mastermind 32575 points

S0 can act as an output enable pin, so try pulling S0 high.

Alan

Clock & timing

Clock & timing forum

CDCE913: request schematic review