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LMK03328: LMK03328

Poornima Shetty
Prodigy 30 points
Part Number: LMK03328
Other Parts Discussed in Thread: CODELOADER

Hi,

We have already raised query on LMK03328 which you can see in this thread-  

Now we are facing problem with programming those registers with the values that are generated as per the above link. Register address that are generated are not in sync with LMK03328 datasheet and they have generated values for 149 registers but in data sheet I can see only 123 registers and there are mismatches between register address. I have attached the generated register values, Please help me with this

Thank you,

Poornima.

Fullscreen Register values_updated_19012018.txt Download 
R0	0x0010
R1	0x010B
R2	0x0232
R3	0x0301
R4	0x0400
R5	0x0517
R6	0x060F
R7	0x07E0
R8	0x0802
R9	0x0900
R10	0x0AA8
R11	0x0B00
R12	0x0CDD
R13	0x0D00
R14	0x0E00
R15	0x0F00
R16	0x1000
R17	0x1100
R18	0x1200
R19	0x1300
R20	0x1455
R21	0x1555
R22	0x16FF
R23	0x1703
R24	0x1800
R25	0x19F5
R26	0x1A00
R27	0x1B20
R28	0x1C50
R29	0x1D07
R30	0x1E40
R31	0x1FA0
R32	0x2020
R33	0x2107
R34	0x22A0
R35	0x2320
R36	0x2413
R37	0x2550
R38	0x2618
R39	0x2750
R40	0x280F
R41	0x2910
R42	0x2A04
R43	0x2B10
R44	0x2C04
R45	0x2D0A
R46	0x2E00
R47	0x2F00
R48	0x30FF
R49	0x310A
R50	0x32A5
R51	0x3303
R52	0x3400
R53	0x3500
R54	0x3600
R55	0x3700
R56	0x381E
R57	0x3915
R58	0x3A00
R59	0x3B62
R60	0x3C05
R61	0x3DCC
R62	0x3E60
R63	0x3F13
R64	0x4012
R65	0x41D0
R66	0x4203
R67	0x4318
R68	0x4402
R69	0x4511
R70	0x4604
R71	0x4702
R72	0x4818
R73	0x4900
R74	0x4A64
R75	0x4B00
R76	0x4C00
R77	0x4D00
R78	0x4E00
R79	0x4F00
R80	0x5001
R81	0x510C
R82	0x5204
R83	0x5301
R84	0x5404
R85	0x5507
R86	0x5630
R87	0x5700
R88	0x5800
R89	0x59E3
R90	0x5A01
R91	0x5B32
R92	0x5C01
R93	0x5D59
R94	0x5E01
R95	0x5F9C
R96	0x6001
R97	0x61EE
R98	0x6202
R99	0x632E
R100	0x6402
R101	0x65A4
R102	0x6603
R103	0x670A
R104	0x6801
R105	0x699C
R106	0x6A05
R107	0x6B00
R108	0x6C08
R109	0x6D0F
R110	0x6E1F
R111	0x6F00
R112	0x7000
R113	0x7100
R114	0x7200
R115	0x7308
R116	0x7419
R117	0x7580
R118	0x7607
R119	0x7705
R120	0x7800
R121	0x7900
R122	0x7A08
R123	0x7B0F
R124	0x7C1F
R125	0x7D00
R126	0x7E00
R127	0x7F00
R128	0x8000
R129	0x8108
R130	0x8219
R131	0x8300
R132	0x8407
R133	0x8505
R134	0x8600
R135	0x874A
R136	0x884E
R137	0x8910
R138	0x8A4A
R139	0x8B00
R140	0x8C00
R141	0x8D17
R142	0x8EBF
R143	0x8F00
R144	0x9000
R145	0x9100
R169	0xA940
R172	0xAC24
R173	0xAD00
 

  • 0
    TI__Mastermind 32575 points

    Hello,

    Please send the .mac setup file from Codeloader, which includes your frequency plan for review.

    The register list exported from Codeloader includes some additional reserved registers. These registers are not included in the datasheet since they are not intended to be modified by customers.  However,  codeloader must include all registers (including reserved fields) to generate a complete EEPROM image file.

    Alan

  • 0 in reply to Alan O
    Prodigy 30 points

    Hi,

    Here is the .mac setup file from Codeloader which includes our frequency plan.

    LMK03328 K2H Example2_UPDATED.zip

  • 0 in reply to Poornima Shetty
    TI__Expert 4555 points

    Hello Poornima,

    I was able to program one of our own EVMs without any issue using the .mac file you provided. I'm curious to know whether:

    1. You are using our EVM to program the configuration or trying to program it within your application system?

    2. Have you tried programming it yet? It was unclear in your original post whether you tried to program it yet, or just saw the mismatched registers in the Datasheet and assumed something was wrong. As Alan had stated previously, there are additional reserved registers in CodeLoader that do not match up with the datasheet, but these are needed to program a complete configuration to the device.

    If you are using our EVM, the default crystal oscillator is 50 MHz. However, in the configuration, it is set to 25MHz. If you are unable to see an output, this would be the case. I would suggest to either replace the oscillator with a 25 MHz crystal, or change the value in the GUI to 50 MHz and turn off the SECREF Doubler (You will have slightly decreased performance with this use case).

    Regards,

    - Jonny 

  • 0 in reply to Jonathan Nguyen
    Prodigy 30 points

    Hi,

    Here is my reply for the questions you have asked.

    1. You are using our EVM to program the configuration or trying to program it within your application system?
              We are developing our custom application on a custom Board where FPGA/CPLD will be I2C Master to configure clock Synthesizer using RTL.

    2. Have you tried programming it yet? It was unclear in your original post whether you tried to program it yet, or just saw the mismatched registers in the Datasheet and assumed something was wrong. As Alan had stated previously, there are additional reserved registers in CodeLoader that do not match up with the datasheet, but these are needed to program a complete configuration to the device.
    If you are using our EVM, the default crystal oscillator is 50 MHz. However, in the configuration, it is set to 25MHz. If you are unable to see an output, this would be the case. I would suggest to either replace the oscillator with a 25 MHz crystal, or change the value in the GUI to 50 MHz and turn off the SECREF Doubler (You will have slightly decreased performance with this use case).


            We are in development stage, On Board testing is in pipeline and not started yet. It is just that we found discrepancy in the register count while cross checking the register values. We though of clarifying it with TI. The Clock Synthesizer supports only Block Write/Read and the addressing would be sequential, in our case the datasheet does not list out the address of the reserved registers hence it became difficult for us to figure out and develop a RTL code. Please help us to understand the sequence using reserved registers also. Since the MAC file shows 32 bit data out of which Byte 0 is DATA and Byte 1 is ADDR. We want to understand how the configuration is to be done. What values to be written on to reserved registers which are not mentioned in either datasheet as well as MAC File.

    Regarding the External reference clock. We are using SECREF with 25MHz on our custom board. Based on our configuration we have generated the MAC File from the CodeLoader tool.

    Regards,

    Poornima

  • 0 in reply to Poornima Shetty
    TI__Expert 4555 points

    Hi,

    You can export the register map as a hex file, and the register export is sequential. The hex file will give you the register address/data needed to program the device to your frequency plan. We do recommend however, to avoid writing to these reserved registers:

    Registers to Exclude
    Reason
    R0
    Read only
    R1
    Read only
    R2
    Read only
    R3
    Read only
    R4
    Read only
    R5
    Read only
    R6
    Read only
    R7
    Read only
    R8
    Read only
    R9
    Read only
    R10
    Read only
    R13
    Read only
    R16
    Read only
    R18
    Read only
    R26
    Internal debug register. Don't overwrite.
    R48
    Internal debug register. Don't overwrite.
    R87
    Internal debug register. Don't overwrite.
    R106
    Internal debug register. Don't overwrite.
    R107
    Internal debug register. Don't overwrite.
    R108
    Internal debug register. Don't overwrite.
    R109
    Internal debug register. Don't overwrite.
    R110
    Internal debug register. Don't overwrite.
    R111
    Internal debug register. Don't overwrite.
    R112
    Internal debug register. Don't overwrite.
    R113
    Internal debug register. Don't overwrite.
    R114
    Internal debug register. Don't overwrite.
    R115
    Internal debug register. Don't overwrite.
    R116
    Internal debug register. Don't overwrite.
    R121
    Internal debug register. Don't overwrite.
    R122
    Internal debug register. Don't overwrite.
    R123
    Internal debug register. Don't overwrite.
    R124
    Internal debug register. Don't overwrite.
    R125
    Internal debug register. Don't overwrite.
    R126
    Internal debug register. Don't overwrite.
    R127
    Internal debug register. Don't overwrite.
    R128
    Internal debug register. Don't overwrite.
    R129
    Internal debug register. Don't overwrite.
    R130
    Internal debug register. Don't overwrite.
    R135
    Read only
    R136
    Read only
    R137
    Don't write yet. NVMCTL is only used for SRAM/EEPROM access.
    R138
    Read only
    R139
    Don't write yet. MEMADR_BY1 is only used for SRAM/EEPROM access.
    R140
    Don't write yet. MEMADR_BY0 is only used for SRAM/EEPROM access.
    R141
    Read only
    R142
    Don't write yet. RAMDAT is only used for SRAM access.
    R143
    Read only
    R144
    Don't write yet. NVMUNLK is only used for EEPROM programming.
    R145
    Don't write yet. REGCOMMIT_PAGE is only used for SRAM write.
    R169
    Internal debug register. Don't overwrite.
    R172
    Internal debug register. Don't overwrite.
    R173
    Internal debug register. Don't overwrite. 

    Overwriting read only registers are harmless, but will add overhead. Because of the gaps in the register list due to these omitted registers, you can use single register write commands or multiple block register write commands to program your device. Once the device registers are written to, you can execute a soft-reset to re-initialize the device with these new values. Once the registers are written to, you can also commit those registers to the SRAM to program the device EEPROM to allow the configuration to start up upon a power reset.

    I hope this clears things up for you on how the programming sequence is done. Please let me know if you need any further clarification on anything.

    Regards,
    -Jonny