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TRF3765EVM: Is TRF3765EVM suitable to be used as as external clocks for ADC12J4000EVM and DAC38RF82EVM?

Tong Xu
Intellectual 515 points
Part Number: TRF3765EVM
Other Parts Discussed in Thread: ADC12J4000EVM, DAC38RF82EVM, , TRF3765, DAC38RF82, ADC12J4000, ADC32RF45, LMK04828

Hi everyone,

We have bought two ADC12J4000EVM boards and a DAC38RF82EVM board. I'm wondering if TRF3765EVM is suitable to be a clock source for the ADC/DACs we have.

In my design,  the two ADCs operate at a sampling rate of 3GSPS and the DAC operates at 3GSPS in dual channel mode. 

Each ADC12J4000EVM requires two external clocks input, which are LMKCLK and DEVCLK. The DAC38RF82EVM also needs an external clock if my understanding is correct. So overall the converters need 5 clock inputs.

We're considering to buy a TRF3765EVM to serve as the clock source, but I'm not sure if this one is a good choice. Can anyone tell me if TRF3765EVM meets the requirements (such as signal quality, power level)? 

Thank you.

Regards,

Tong

  • 0
    TI__Mastermind 18095 points
    Tong:

    The ADC12J4000EVM already has a TRF3765 device on the board to supply the clock. You can use that set-up as is and reprogram the synthesizer to 3 GHz for your case.

    The DAC38RF82 device has a built in PLL/VCO for the sample clock. You can use that programmed at around 6 GHz. The internal PLL/VCO does not support 3 GHz. You can inject an external clock source of 3 GHz if desired. The TRF3765 will suffice, though its phase noise performance will likely impact spectral performance of the DAC output. If the degradation is within your limits then no issues.

    --RJH
  • 0 in reply to RJ Hopper
    Intellectual 515 points
    Hi RJH,

    Thank you very much.

    I didn't realize that there is already a TRF376T on ADC12J4000EVM, because I didn't find it on the schematic.

    You said the PLL/VCO on DAC38RF82EVM could be programmed at around 6 GHz, does this mean the DAC can run at 3GSPS in dual channel mode without using external clock?

    If I want to process the ADC sampled data in FPGA and then send them to DAC out, the sampling rate should be exactly the same so that resampling is not required. Will it causes problem if the clocks with same frequency are generated by different sources?


    Regards,
    Tong
  • 0 in reply to Tong Xu
    TI__Mastermind 18095 points
    Tong:

    The DAC38RF82 has a built in PLL/VCO for generating the sample clock; it can be programmed to around 6 GHz or 9 GHz. There is also a divided clock output with divide by 2, 3, or 4. You could program the internal DAC PLL/VCO to 6 GHz and use the divide by 2 output and send that clock to the ADC12J4000 (in external clock mode). This keeps your clocks synchronized (not necessarily needed). You can adjust the interpolation/decimation to keep the input/output data rate the same.

    If you simply need a working platform, consider the TSW40RF82. The TSW40RF82 uses the DAC38RF82 with the ADC32RF45 on the same EVM. You can sample the DAC at 6 GHz and the ADC at 3 GHz. There are on-board clocking options to clock the ADC from either a separate synthesizer or with the divided DAC clock output. That EVM may be a convenient platform to use for your application.

    --RJH
  • 0 in reply to RJ Hopper
    Intellectual 515 points

    Hi RJH,

    Thank you very much.

    We already have a FPGA board, which is HTG700. We have two ADC12J4000EVM boards and a DAC38RF82EVM. I the two ADC12J4000EVMs and the DAC38RF82EVM with our FPGA board.

    I checked the schematic of DAC38RF82EVM and didn't figure out how to send the clock to ADC12J4000EVM.

    Could you tell me the location of clock output port on DAC38RF82EVM?

    The ADC12J4000EVM needs two clock input (DEVCLK and LMKCLK) when working in external clock mode, will the clock from DAC38RF82EVM meet the power requirement after splitting? 

    I'm also trying to figure out how to output the onboard clock from ADC12J4000EVM. Is it possible?

    Regards,

    Tong

  • 0 in reply to Tong Xu
    TI__Expert 4880 points

    Hey Tong,

    Russell was not suggesting to use a different FPGA. He was suggesting to use the TSW40RF80 EVM which includes both an ADC32RF45 and a DAC38RF82 on a single board which would make for a simpler clocking solution for your desired setup.

    CLKTXP(J26) is the divided output port of the internal DAC clock.  

    In regards to external mode operation, yes the DAC clock will satisfy the power requirement after splitting. Keep in mind that LMK clock-in on the ADC EVM needs to be half of the device clock frequency which will require a divider.

    Also the DAC only allows for dividing the internal clock by 3 or 4 not 2. So you may need to adjust your sampling clocks based on this restraint.

    And there is not an output port for the ADC device clock on the ADC12J4000EVM.

    Yusuf

  • 0 in reply to Yusuf%20Agoro
    Intellectual 515 points

    Hi Yusuf,

    Thank you very much.

    I checked the user guide (SLAU551A) of ADC12J4000EVM, it says that the two external clocks must be the same if the frequencies are below 3100MHz.

    On page 7 it says:

    "

    For frequencies at 3100 MHz and below, the two clock sources must be set to the same
    value. For frequencies above 3100 MHz, the clock source that is used to drive the
    LMK04828 (labeled LMKCLK) must be half of the frequency used to drive the ADC12J4000
    sampling clock (labeled DEVCLK)

    "

    Does this mean I can use the same clock for LMKCLK and DEVCLK if ADC's sampling frequency is 3GHz?

    Regards,

    Tong

  • 0 in reply to Tong Xu
    TI__Expert 4880 points

    Hey Tong, 

    So the user guide you are referencing is one with an older revision date than the one i am referencing and both mention two different things in regards to the LMK clock. If your user guide is correct then yest you can sample both the lmkclk and devclk if adc sampling frequency is 3GHz. If that does not work, try the dividing the LMK clock by 2. 

    Reference page 8 of the most recent revision of the user guide. 

    Yusuf

  • 0 in reply to Yusuf%20Agoro
    Intellectual 515 points
    Hi Yusuf,

    Thank you very much.

    The User Guide I was reading is an old version. I agree that the clock relations mentioned in the new version is correct, since everytime I need to manually modified the clock configuration in ADC12J4000EVM GUI.

    Regards,
    Tong
  • 0 in reply to RJ Hopper
    Intellectual 515 points
    Hi RJH,

    Could you tell me if the ADC12J4000EVM has clock output? I'm wondering if I can use it as the reference clock for DAC38RF82EVM.
    I found a SMA called EXT_VCO on the ADC board, but I cannot find it in the schematic.

    Regards,
    Tong
  • 0 in reply to Tong Xu
    TI__Expert 4880 points

    Hey Tong, 

    The ext_vco is sma is for the on board TRF3765. EXT_VCO enables you to use the TRF3765 functions such as dividers with an external LO signal instead of the TRF's internal VCO. To my knowledge there is not an output for the ADC device clock. Reference the following functional block diagrams. 

    ADC12J4000 EVM schematic. See that EXT_VCO is routed to the TRF device and serves as an input. Not an output signal from the ADC. 

    TRF3765

    ADC12J4000

    Yusuf

  • 0 in reply to Yusuf%20Agoro
    Intellectual 515 points
    Hi Yusuf,

    Thank you very much.

    I just found out that I was reading an older version (ADC12J4000EVM-SCH_E3) of board schematic in which EXT_VCO is not included.

    Regards,
    Tong