Hi!
I have a custom board with LMK04828 in dual PLL mode, CLKIN0 = 120MHz reference, manual select, OSCin = 240MHz VCXO. PLL1 PDF = 20 MHz, loop BW = 100Hz. Holdover enabled, hitless switch enabled, automatic holdover on PLL1 LOL, MAN_DAC enabled with default value. System works fine until warmup up to ~65..70 Celsius (6-layer PCB temerature, measured 1.5mm off LMK's corner). It switches correctly to and from holdover, holds lock with reference frequency drift (it's stable but for checks) etc. But after it reaches "critical" temperature it looses PLL1 lock and enters holdover. It relocks after being slightly blown with freezer or just short touch with a finger. After I erroneously wrote 0x40 into 0x15C register (with 0x00 in 0x15D) the system changed it's behaviour. After reaching "critical" temp it drops DLD1 status but in fact keeps lock with reference, tracks drifts, CP1 output stays stable, signal spectrum of LMK's outputs is fine and matches that of a locked state. But with such a config LMK does not go into automatic holdover after loosing reference in the "hot" state (in "cold" it's ok with holdover). What could be wrong with PLL1? Power supplies are ok, low-noise, schematics similar to EVM's, separate supplies for clock outputs and VCXO.
TIA,
Sergey