LMX2594: Device Clock to SYSREF Skew and delay steps

Part Number: LMX2594

I'm interested in the skew between a device clock output and a SYSREF output when there are no delay's enabled for the SYSREF; and how much would the skew vary over temperature and voltage?

Also, how typical is the 9 ps step size in the SYSREF delay, does it vary over temperature and do the steps stay consistent as you add more delay.  ie. if the first step is 9 ps is the N-1 to N step also consistent at approx 9 ps.

Thanks,

Jon