Other Parts Discussed in Thread: CDCLVP1204
Hi,
According to the CDCLVP1204 datasheet, IN_SEL pin includes a 150K pull-down resistor. However, this pin is also connected to a 10K pull up resistor in the CDCLVP1204EVM board. As far as I know, if JP1 jumper is closed, pull-down resistor will be shorted, so a low level is guaranted. However, if JP1 is left opened, then there is a resistive divisor that does not guarantee a 3v3 level at the pin (no references about Vih are included in the datasheet for this pin). Is there any reason to include the 10K resistor in this design?
Best,
C.J.
