Part Number: LMK04826
Hello TI suport team,
It it possible to have deterministic phase for OSout? We want to use it as one device clock and need deterministic phase at each powerup.
Thanks, kk
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Hello KK,
Yes, it is possible. Which mode are you using? I expect you are using dual loop with the VCXO. To have the deterministic phase between output clocks and input clocks, nested 0-delay modes is useful. To have the phase of the OSCout also deterministic, you can also combine the nested and cascaded loops. That means you can select the FB_MUX from PLL1_NCLK_MUX and also from PLL2_NCLK_MUX like shown below:
Let me know if you need further help on setting up this mode.
Best regards
Puneet