• State Resolved
  • Locked Locked
  • Replies 2 replies
  • Subscribers 22 subscribers
  • Views 714 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LMK04906: CodeLoader output file doesnt match the datasheet

Cagil Gumus
Prodigy 20 points

Part Number: LMK04906
Other Parts Discussed in Thread: CODELOADER

Greetings,

We are using CodeLoader software to generate the necessary registers to program our LMK04906. We were having locking issues with the PLL so we decided to check each individual registers. 

We have observed that some of these registers are not behaving accordingly to what datasheet says. 

For example: 

Registers R6 and R7 bits [19:16] should be 0 according to CodeLoader. However when we look at Codeloader output these registers are non-zero

Is this a bug or a feature? Can this effect the PLL locking?

PS: we have more discrepancies this was just the first example. 

Sincerely. 

Cagil.  

  • 0
    TI__Expert 8865 points
    Hi Cagil,
    All the registers which has different default values in the Codeloader than specified in the datasheet does not effect locking. Are you using TI EVM or a custom board? Are you loading default configuration from the Codeloader?
    Best regards
    Puneet
  • 0 in reply to Puneet Sareen
    Prodigy 20 points

    Hi Puneet,

    We are using a custom board with this LMK04906 . We were not using a 'default' setting but we are modifying it in order to generate a specific clock frequency for FPGA board.

    Are there any reason why these discrepancies exists between what datasheet says and what Codeloader gives? If it doesnt affect the locking then we have to look elsewhere for our problem. 

    Regards. 

    Cagil.