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LMK04208: Min, Typ and Max Lock Time Calculation of PLL1 and PLL2

Hirotaka Matsumoto
Guru 27585 points
Part Number: LMK04208

Hi all

Would you mind if we ask LMK04208?

Could you let us know Min, Typ and Max Lock Time Calculation of PLL1 and PLL2?

We could find as follows;

-PLL1's typical? Lock Time Calculation : 1 / (PLL1_DLD_CNT * PLL1 phase detector frequency) on the datasheet P119
-PLL2's minimum Lock Time Calculation : PLL2_DLD_CNT / Phase detector frequency on the datasheet P105

If you have following formulas, could you let us know?
-PLL1's minimum Lock Time Calculation
-PLL1's maximum Lock Time Calculation
-PLL2's typical Lock Time Calculation
-PLL2's maximum Lock Time Calculation

We need your help.

Kind regards,

Hirotaka Matsumoto

  • 0
    TI__Guru** 108550 points
    Hi Matsumoto-san,

    If you are looking for the digital lock detect response time, there is no min. typ. and max. value.
    This response time is user configurable.
    For example, if the phase detector frequency is 1MHz, each phase detector cycle is therefore equal to 1µs. If you set PLLx_DLD_CNT to 1000, then the digital lock detector will assert HIGH after 1000µs. If you set PLLx_DLD_CNT to 40, then the digital lock detector will assert HIGH after 40µs.