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CDCLVC1104: Input slew rate spec and ferrite bead

Genius 17485 points
Part Number: CDCLVC1104


Hello

 

I have some questions about CDCLVC1104.

1.

The datasheet (SCAS895B) defines “Input slew rate” as 1 – 4 V/ns in 6.3 Recommended Operating Conditions table. 

If input clock is slower than this definition like 0.4V/ns with 33MHz, what kind of problem could happen?

 

2.

The same datasheet recommends to use ferrite bead on the power supply in page 12 of 10 Power Supply Recommendations.

What kind of problem could happen if this ferrite bead is not used? The input clock frequency is the same, 33MHz.

 

Regards,

Oba

  • Hi Oba,

    1, Driving the input with a slower slew rate can degrade the additive jitter and noise floor performance.

    2, "TI recommends, but does not require, inserting a ferrite bead between the board power

    supply and the chip power supply that isolates the high-frequency switching noises generated by the clock buffer;

    these beads prevent the switching noise from leaking into the board supply. It is imperative to choose an

    appropriate ferrite bead with very low DC resistance to provide adequate isolation between the board supply and

    the chip supply, as well as to maintain a voltage at the supply terminals that is greater than the minimum voltage

    required for proper operation."

    The board supply would support different chips on the board. When the board supply carried switching noise, all other chips would be found the switching noise.

    In your case, 33MHz switching noise on CDCLVC1104 VDD pin would be isolated. If other chips don't care about this switching noise, then the ferrite bead could be ignored.

    Regards,

    Shawn