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LMX2595: Ramp reset bit

James Mackie2
Prodigy 90 points
Part Number: LMX2595

Hi,
I am using the lmx2595 for an application generating a ramp from 15.4-15.7 GHz calibration free. My ramp0 and ramp1 triggers are the rise and fall of a pwm signal. My loop bandwidth is high(~500kHz). I am seeing some variance in the starting point from ramp to ramp and am not enabling the ramp0 reset bit (register 97 bit 15). I have register 0x61 set to 0x0c88 but when I set it to 0x8c88 my ramp jumps to a low value, around 15.3 GHz and only ramps up to around 15.4 GHz before restarting the next ramp. What value does the reset attempt to set it to to reduce rounding error? Is it the Ramp Low threshold? The calculated ramp1inc multiplied by the ramp1len? ramp0 starting numerator and pll_n divider? If it is those then where are those stored? Thanks.

Also the datasheet recommends operating the ramp mode at less than 125MHz phase detector freq but I have found better performance(side spur levels, consistent ramp to ramp start points) ramping at 200MHz instead of 100Mhz. Any thoughts on this?


-James

  • 0
    TI__Expert 5370 points
    Dear James,

    someone will answer your question tomorrow wrt the reset.

    On the PFD maximum frequency recommended. we recommend 125 MHz max. because the ramping feature operate (so is the DS modulator for ramping ) on that frequency and we likely found potential issues for the logic to operate at higher speed.

    thank you for your patience on the reset question.

    Regards, Simon.