This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LMX2595: Phase Drift in SYNC Mode

Part Number: LMX2595

Hi TI-Experts,

could you provide information about the absolute Phase Drift and Accuracy of two synced devices? Are these parameters affected when running the PLL in an Integer-Mode with CHDIV=1 (SYNC Category1 -> No Sync Mode required), since we want to maintain a 400 MHz PFD frequency to keep the Phase Noise as low as possible.

Thanks!

  • Johannes,

    We have no guaranteed number for the amount of phase drift. I can say the following though:

    1. I tested corner lots and found the max varaition for this to be about 60 ps between devices.
    2. The variation over temperature varies about 2.5 ps/C. So if the devices heat unevenly, this could introduce some skew.
    3. I have done experiments like lock two PLLs at 12 GHz and go to lunch and come back and see pretty much the same phase. I didn't exactly quantify this, but this gives an idea that the phase is somewhat stable.

    Regards,
    Dean