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CDCM6208: what's the actual model of Vcm-DC ?

Part Number: CDCM6208


Hello,

     I find a strange description about the Vcm-DC of LVPECL/CML/LVDS from datasheet of CDCM6208:

LVPECL:

CML:

LVDS:

Can you tell me the actual model of DC couple? I want to know the test DC couple schemetic of CDCM6208's output,Thank you very much.

  • Hi Jiaxin,

    The lead engineer is on vacation, he will get back to you later. Thank you for your patience.
  • Hi Jiaxin,
    CDCM6208 adopt CML driver to output LVDS-like and LVPECL-like type.

    "LVDS-like: All outputs Y[7:0] support LVDS-like signaling. The actual output stage uses a CML structure and drives a signal swing identical to LVDS (~350mV)."

    "LVPECL-like: Outputs Y[3:0] support LVPECL-like signaling. The actual output stage uses a CML structure but drives the same signal amplitude and rise time as true emitter coupled logic output stages."

    So VCM-DC test condition is the same as CML driver: "DC coupled with 50 Ω on-chip termination to VDD_Yx_Yy".

    Regards,
    Shawn
  • Reply to your : CM-DC test condition is the same as CML driver: "DC coupled with 50 Ω on-chip termination to VDD_Yx_Yy",

    But According to my calculations I think the real calculation is not the same as what datasheet. says

    So can you give me a detailed process of analysis in the DC couple with LVDS like and LVPECL like?

  • Jianxin,

    CDCM6208 LVDS-like type is a low power CML (lpcml) driver, LVPECL-like type is a high swing CML (hscml) driver. We recommended AC coupling for LVDS/ LVPECL receiver, then the unmatched Vcm  from CDCM6208 could be ignored.

    If you really need DC couple with load, a IBIS model simulation could help you.

    CDCM6208 IBIS model

    Regards,

    Shawn

  • Hello,

        I think the Vcm-DC should be the open-circuit voltage, other than the coupled voltage. Because the DC--couple will add load after the CML output, then I think the Vcm-DC data is wrong.

        The second reason is if Vcm-DC in the DC-coupled is min(Vref-0.13), considering the wave swing, the max voltage is bigger than Vref, Please give me an explaintion.

  • Hi Jiaxin,

    Standard CML drivers that are built from an open-drain differential pair. The outputs (Output+ and Output–) require pullup resistors to VDD because the NMOS transistor can drive only falling edges efficiently and needs the pullups to help drive rising edges.

     VDD_Yx_Yy-0.13 is for typical value.

    The spec swing Vod is measured by AC coupling,which can't be add on Vcm-DC directly.

    If you are using LVDS or LVPECL receiver, please use AC coupling.

    If you are using CML receiver, AC or DC coupling can be accepted.

    Regards,

    Shawn

  • I disagree with you explantion about CML output struction becasue of the DATASHEET Fig 12:

    From Fig 12, CML output matching impedance 50 ohm is in the IC, So your explatnion is wrong.

  • The VCM-DC is the open circuit voltage and measurement is done at DC where Voh, Vol are measured with high impedance probe and then Vcm-dc is calculated. 

  • So there are two questions which are needed to explain.

    1) Output Matching impedance is integrated in the IC or not? According to the datasheet Fig12, I think it is in the IC output struction. But considering your pre-reply, you think there is no Output Matching impedance  in the IC. So please give me a confirm.

    2) VCM-DC's measurement method is which one? The first is your explain: open circuit voltage ( with  Output Matching impedance  is Not in the IC)  The second is output struction (with  Output Matching impedance in IC) DC coupled with post-circuit.At the same time, post-circuit must be DC matching . Which one is the actual way in datasheet.

    Thank you for your reply. And I suggest TI's datasheet should be detailed in measurement method considering the majority of user.

  • The output is CML based and has on-chip 50 ohm impedance. The DC measurement is done with a high impedance probe at the output pins.

    We will add this to the updates needed for the datasheet in our next update cycle.
  • When I mentioned open circuit, there is no impedance matching external to the IC.
  • You are correct. CDCM6208 output driver had integrated "50 Ω on-chip termination".

    That's why the test condition is "DC coupled with 50 Ω on-chip termination to VDD_Yx_Yy".

    For CML driver, the pull up termination is must have,  which could be on-chip (internal) or external.

    There are some confusion on "Open circuits" and "Open Drain" in this thread. The key is how to understand CML driver and receiver.

    Below 2 application notes could help understand more.

    Interfacing Between LVPECL, VML, CML and LVDS Levels

    DC-Coupling Between Differential LVPECL, LVDS, HSTL, and CML