LMX2594: Frequency divider 1/6 section at 2.38-2.5 GHz output issue

Andrew,

I'm not sure exactly what you are saying, but I think it is one of these:

Q1: I see the frequency of RFoutA bleeding through to RFoutB in the case that RFoutA is divided (not direct VCO) frequency

A1: Datasheet says this crosstalk is typically -50 dBc. If this is the spur that is bothering you, then you can play with the pull-up component (inductor vs. resistor) and board layout, but not too many degrees of freedom.


Q2: In the specific case where the VCO divider is 6, I see an undesired frequency of Fvco/3 on RFoutB

A2:
In the specific case of the output divider being 6, the second harmonic of the output B will be high. The reason for this is that the output divide of 6 is really a divide by 2 followed by a divide of 3, and the channel divide of 3 cases a non 50% duty cycle, which implies a high second harmonic. Note that only the output divide of 6 has this case, all others are 50% duty cycle.
So for instance, if your VCO is 15 GHz coming out on OUTB and you divide this down to 2.5 GHz on outA, then the 2.5 GHz signal will have a high second harmonic and produce a 5 GHz unwanted signal on RFoutB.

Note that the divide by 4 can produce output frequencies from 1875 to 3750 MHz and the divide by 6 can produce output frequencies from 1250 to 2500 MHz. So in the range of 1875 to 2500 MHz, you can use either divide value, but I would choose divide by 4 to avoid this high spur. In the range of 1250 to 1875 MHz you must use divide by 6.

Dean, i believe that the bleeding of Fvco and Fvco/3 is normal. In my case it indicates that the PLL is locked and F/2 section works properly. But i don`t see the signal of Fvco/6=2.4999 GHz (instead of excess noise) which must be when i set the CHDIV=6 and Fvco=14.994 GHz. It starts to work at output frequency of ~2.4 GHz. I assume that the section F/3 next to F/2 section doesn`t work at high frequency.
Table 8 on the page 22 in datasheet. There are the allowable output frequency ranges for each CHDIV configuration are described. I see that the use of CHDIV=6 allows to generate the frequency range of 1.25-2.5 GHz. But not in my case.
I will try to switch the CHDIV from 6 to 4 in the range of 1.875-2.5 GHz and keep the CHDIV=6 in the range of 1.25-1.875 GHz. Maybe it will help.

Andrew,

So it sounds like you are not getting the expected divide by 6, but you are getting the expected divide by 2. Ensure that SEG1_EN (R31[14]) = 1. Otherwise it disables everything but divide by 2.

Regards,
Dean