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Original question:

LMK04610: LMK04610: using PLL2 without input reference clock

LMK04610: LMK04610: using PLL2 without input reference clock

Mattijs
Prodigy 60 points

Part Number: LMK04610

According to the datasheet (page 42, June 2017 version), holdover mode can be entered as a result of CTRL_VCXO Rail detect. The boundaries get compared against the current value as present in the PLL1 storage cell array.

On page 42 it is stated:

"The storage cells array is encoded with a thermometer code and the register values are binary encoded. A conversion must take place before comparing."

My question is this: as I read this, I would expect the current value of the storage cell array to be a measure of the current value of the VCXO control voltage. But how do I calculate the storage cell value into a value representing the actual VCXO control value?

When I read back the storage cells array (no input reference clock connected to either CLKIN0 or CLKIN1) the value returned is 0x00 0x00 0x00 0x00 0x28 (register address 0x66 through 0x6A), which at first glance doesn't seem to be a "thermometer encoded" value. What is the "conversion" that must take place before comparing, which is mentioned in the note on page 42?

  • 0
    TI__Mastermind 28590 points

    Hello,

    I have examined the software for readout of the read-out of the storage cell, it appears to treat it as binary and simply display the result.

    I also used holdover mode and set the high/low rail registers, holdover triggered when I set the same value as the current storage cell value as read in binary.

    I will double check to see if there is any reason for this, otherwise my answer is, it appears the storage cell for PLL1 is in binary, not unary/temperature code and is valid for direct comparison.

    73,
    Timothy

  • 0 in reply to Timothy T
    Prodigy 60 points

    Hello Timothy

    Thank you for your time. I'd appreciate if you could double check. In case it is binary, the storage cell value is to be compared against the RAILDET_UP/LOW limits, which are only 5 bit (reg. 7D and 7E) compared to 40 bit for the storage cell, so that would suggest some form of translation, unless 35 bit of the storage cell are actually not used.

    Kind regards,

    Mattijs

  • 0 in reply to Mattijs
    TI__Mastermind 28590 points
    My understanding is yes, this has been converted to binary. You can just make the compare.

    73,
    Timothy