This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LMK04803: LOS status

Part Number: LMK04803

Hi

Both clock inputs (CLKinx) of the LMK04803 are connected to clock sources. One to an on-board oscillator and one to an external source. The STATUS_CLKinx pins are configured to output LOS status. With the external source disconnected the LOS status for that clock is not asserted. LOS_TIMEOUT is set to the maximum of 1200 ns. Register settings are as follows:

0x1B0C01AC, /* R12 */
0x2313120D, /* R13 */
0x130FC00E, /* R14 */

I am able to use the Status_CLKinx_MUX and Status_CLKinx_TYPE register settings to toggle the STATUS_CLKinx pins.

Thanks in advance, Edward

  • Try setting CLKinX_BUF_TYPE = 1 (MOS mode).  The input buffer should be MOS mode when AC coupled to get a differential input offset voltage (~55 mV typ) to prevent noise from resetting the LOS detector circuit.  

    Alan

  • Thanks for your information Alan.

    I changed R14 to set both Buffer types to CMOS (0x133FC00E) but the status pin values didn't change. The LMK is driven by LVDS drivers and the interface is as per the interface described in the data sheet for a differential clock. Based on the interface design noise should be minimal.
  • Is your interface set up like Figure 21 or Figure 26 from the datasheet?

    Alan
  • Sorry, AC coupled. Set up as per Figure 21. Same component values. Driven by SN65LVDS1DBVR

  • What input offset voltage do you measure between CLKinX+ and CLKinX- pins when in the input is configured MOS mode vs. Bipolar mode? Have you probed the signal on those pins when the input clock is not driven to confirm there is no signal/noise that could potentially be gained-up by the input stage and potentially reset the input LOS detector before it reaches its timeout count?

    Alan
  • Sorry for the delay in responding. I was waiting for the board designer to make the measurements. The offset for both is small with around 10 mV PP noise. Have attached screen shots.

    The first is CMOS

     

    The second is Bipolar.

    The mystery may be solved. By switching clock sources, I found that LOS is only asserted for the selected clock so that when CLKin1 is selected manually (holdover not used) that LOS for CLKin0 (external clock not connected) isn't asserted. When I switched to CLKin0 then LOS was asserted. LOSx being viewed on STATUS_CLKinx outputs. My original description was incomplete but I expected the status to be active irrespective of which clock source was selected.

    The problem we are chasing is that on one of our production boards we can't get LD to indicate DLD for PLL1 even though we don't see LOS asserted for CLKin1

  • Thanks for the update. I do believe the LOS is reflected for the clock input you select manually, as you observed. I will confirm this and let you know.

    Alan
  • Thanks Alan