Hi team,
My customer is using CDCLVD110A, and turning on Q2 only, using CLK0 as the single-ended CLK input.
They found that when REFCLK is provided before CDCLVD110A powers up, output will have no CLK.
But when REFCLK is provided after CDCLVD110A powers up, output will have CLK.
Do you meet same issue or have any suggestion?
Thanks!