This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

CDCLVD110A: No output issue

Part Number: CDCLVD110A

Hi team,

My customer is using CDCLVD110A, and turning on Q2 only, using CLK0 as the single-ended CLK input.
They found that when REFCLK is provided before CDCLVD110A powers up, output will have no CLK.

But when REFCLK is provided after CDCLVD110A powers up, output will have CLK.

Do you meet same issue or have any suggestion?

Thanks!

  • Hi Luke,

    It is not recommended not to provide REFCLK before CDCLVD110A powers up. The absolute maximum ratings specification for input voltage requires the input voltage must be less than VDD (see datasheet table 6.1). I hope this information helps.

    Kind regards,
    Lane