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CDCE913: how to use cdce913 or other pll to synchronize to a 10Mhz timebase output of other equipment?

Part Number: CDCE913
Other Parts Discussed in Thread: THS4304

I want to synchronize StandFord Research S860 Lock-In Amplifiers (www.thinksrs.com/.../SR860c.pdf) timebase to my pcb board.  S860 Lock-In Amplifiers has a 10MHz timebase BNC output for synchronizing other devices. I am not sure whether CDCE913 can be used to accept S860 10Mhz output clock. Could anyone can give me some advice how to select a proper PLL chip? Thanks a lot.

bellow is the s860 timebase output principle:

  • Hi sfd,

    Are you looking for a device having multiple outputs that are able to accept and synchronize the 10MHz output from the test equipment?
    If the input and output freq are the same, then a clock buffer may be enough for you.
    Tell us what exactly you want to do, we can help find out a solution to you.
  • Much Thanks to Fung. i just want choose a proper clock chip to drive DDS chip AD9832. i am not sure 33500b outputs what kind of clock and whtether the 10Mhz clock output can be compatible to a clock chip of TI. Below is what is want to do.

  • Hi sfd,

    CDCE913 can do a 10MHz to 25kHz LVCMOS conversion. However, CDCE requires a LVCMOS input.
    So, you need some kind of schmit trigger or inverter logic gate to transform the 10MHz sine wave to square wave first.
  • Thanks for your help. Now i found the 10Mhz reference clock is a squre wave of 0.66v(pv), i use a high speed OP(THS4304 ) to amplify it to 1.8V . Then sent the amplifyed clock to cdce913. 

    Another question, i found the rise time(%20-80%) of the 10Mhz 10Mhz reference clock i  is about 6ns while cdce913 require 3ns at most. Can my circuit work? Thanks!

  • Hi sfd,

    I am not quite sure on the slew rate requirement for this device. In general, if the slew rate is too small (i.e. rise time is too long), then either it will not lock or the output phase noise is going to be very bad.