TLC555: PWM below 50% duty cycle, and example in data sheet

Alex Brain

Part Number: TLC555
Other Parts Discussed in Thread: NE555

Hi, we've built a PWM circuit based on the example in the TLC555 data sheet (section 9.2.2), but can't get less than a 50% duty cycle.

We've a 500Hz square wave clock input to the Trigger, and the Threshold is fed from an RC network as you'd expect (3k resistor, 0.47uF capacitor).

We can vary the control voltage and get a change in the duty cycle, but the key fact is that when the clock is low, which causes the output to be set, the threshold input to reset the output does not take effect until the clock goes high, hence the minimum duty cycle is set by the 50% clock duty cycle.

This means that the graphs shown in figure 15 are not achievable in reality with the TLC555 if you're using a 50% clock, and I suspect that these were generated using a traditional 555 chip.

Can you confirm that this is a constraint when using the TLC555, and amend your data sheet to either have graphs that reflect the behaviour of the device, or at least a note detailing this fact more clearly, especially around the PWM example and the clock source.

Alex

over 7 years ago

0 Ron Michallick over 7 years ago

TI__Guru**** 164396 points

Alex,

The example waveform is a copy of the NE555 waveform. However the NE555 wouldn't produce less than 50% output with a 50% input waveform. So the waveform is also not correct for NE555. It seems to me that the waveform was hand drawn in 1973 although I can't prove it.

All 555 timers are level triggered and also level threshold(ed). In other words, the trigger and threshold inputs are not edge triggered. The output positive duty cycle should be the greater of input negative duty cycle or the time to get capacitor voltage up to control voltage (divided by clock period).

I am currently working on a new TLC555 data sheet and will add this to the list of data to re-take.

This circuit is used to make the 555 timer act as if it was edge triggered.

0 Alex Brain over 7 years ago in reply to Ron Michallick

Prodigy 40 points

Many thanks Ron, especially for the quick response!

In case it helps, I've uploaded our Spice model that we've used, and since we used a 555 to generate our clock, we've changed the duty cycle on that and now have our system working.

Best regards,

Alex

Fullscreen 555PWMexample.txt Download

Version 4
SHEET 1 996 1028
WIRE 0 256 -16 256
WIRE 576 352 448 352
WIRE 752 352 576 352
WIRE 96 432 -48 432
WIRE 448 432 448 352
WIRE 448 432 320 432
WIRE 576 448 576 352
WIRE 96 496 -320 496
WIRE 384 496 320 496
WIRE 752 496 752 352
WIRE -144 560 -208 560
WIRE 96 560 -144 560
WIRE 384 560 384 496
WIRE 384 560 320 560
WIRE 560 560 384 560
WIRE 576 560 576 528
WIRE 576 560 560 560
WIRE 96 624 32 624
WIRE 384 624 320 624
WIRE -320 640 -320 496
WIRE -208 656 -208 560
WIRE 560 688 560 560
WIRE 32 704 32 624
WIRE 448 704 448 432
WIRE 448 704 32 704
WIRE 384 752 384 624
WIRE 752 752 752 576
WIRE -320 768 -320 720
WIRE -208 768 -208 736
WIRE -48 784 -48 432
WIRE 384 880 384 832
FLAG -320 768 0
FLAG 752 752 0
FLAG -144 560 PWMOUT
FLAG -208 768 0
FLAG -48 784 0
FLAG -320 496 Clock
FLAG 560 752 0
FLAG 384 880 0
SYMBOL res -224 640 R0
SYMATTR InstName R4
SYMATTR Value 10K
SYMBOL voltage 752 480 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value 5
SYMBOL voltage -320 624 R0
WINDOW 123 24 146 Left 0
WINDOW 39 24 125 Left 0
WINDOW 3 -347 103 Left 2
SYMATTR Value PULSE(0 5 0 0 0 1.8m 2m)
SYMATTR InstName V2
SYMBOL Misc\\NE555 208 528 R0
SYMATTR InstName U2
SYMBOL cap 544 688 R0
SYMATTR InstName C2
SYMATTR Value 470n
SYMBOL res 560 432 R0
SYMATTR InstName R2
SYMATTR Value 1348
SYMBOL voltage 384 736 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName Control_Voltage
SYMATTR Value PULSE(0 5 0 50m 50m 0 100ms)
TEXT -672 904 Left 2 !.tran 200m

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TLC555: PWM below 50% duty cycle, and example in data sheet