The VCXO (U2 CVHD-950-122.88) uses a local ground (GND_VCXO) which is connected to the board ground through a ferrite bead (R374).
This is very unusual. Why a ferrite bead in ground?
What I am seeing on the support blogs for other chips ….
“The ferrite beads on PLL GND/supply was recommended by the PLL design team (the folks from this design team are no longer at TI, so no further follow up or clarification is possible)”
“The PLL was characterized with 50mV noise on the supply” with a mention of preventing RF ground loops supports perhaps the ferrite beads may be used on the evaluation boards to isolate the VCXO from this inserted noise for PLL test"
Thanks
Dave