LMX2572: PLL Lock Time of LMX2572

Derek Wang

Intellectual 615 points

Part Number: LMX2572
Other Parts Discussed in Thread: PLLATINUMSIM-SW

Hi TI Experts,

We have measured the PLL lock time of LMX2572 by scope, and the results are as below.

VCO Calibration Mode is no assist.

Could you help to check if these results are correct? Or close to your test results?

If you have any test results of PLL lock time, could you share to us?

Thanks a lot.

fc = 1565MHz hop to 932.5MHz, PLL Lock Time = 320usec

fc = 932.5MHz hop to 1565MHz, PLL Lock Time = 700usec

fc = 4000MHz hop to 4600MHz, PLL Lock Time = 580usec

fc = 4600MHz hop to 4000MHz, PLL Lock Time = 550usec

over 7 years ago

0 Dean Banerjee over 7 years ago

TI__Mastermind 28021 points

Derek,

Lock time is application specific. It varies on the input frequency, phase detector frequency, PLL loop bandwidth, VCO Calibration settings, and settling tolerance. It can vary from 5 us to 5000000 us, so there is no one simplified answer to this.

That being said, for the EVM in default mode with default loop filter, our PLLatinum Sim tool predicts about 160 us, which is dominated by the VCO calibration time. However, it varies drastically with how the PLL is set up.

You can download our PLLatinum sim tool at ti.com/tool/PLLATINUMSIM-SW.

Regards,

Dean

Clock & timing

Clock & timing forum

LMX2572: PLL Lock Time of LMX2572