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LMK00101: Single Ended Osc. connectivity and unused input termination

Part Number: LMK00101

TI team, 

can you please suggest a best way to connect a single ended (3.3V) oscillator to LMK00101. It seems like using the OSCin pin will work best but there is no method describing what is the best practice to do this(and in fact this option is only mentioned as a side note in section "OSCin/OSCout Pins"). Clock frequency used is 24Mhz. 

Follow up questions are :

  1. How the OSCout pin should be connected if the crystal oscillator input is used for actual oscillator connected to OSCin input (and not crystal)
  2. CLKin0/1 pins will remain unused in this case, what will be the best way to terminated these unused inputs. Leaving them floating seems wrong. 
  3. Setting SEL1 - '1' (3.3V) and SEL0 - '0' GND will put the device in OSCin (Crystal Mode)
  4. OE - '1' (always ON)

Thanks in advance for your help!, 

Lev.

  • 1. OSCout should be left floating when OSCin is driven through the AC-coupled interface circuit shown in Figure 11.
    2. Unused CLKinX+/- inputs can all be left floating safely, or all pulled down to GND.
    3. OK, no problem.
    4. OK, no problem.

    Alan
  • Alan,

    many thanks for your answer! Can you please suggest the best clock input when a single ended oscillator is used. On page 11 of the datasheet you state that CLKinX inputs are preferable - "While OSCin provides an alternative input to multiplex an external clock, it is recommended to use either differential input (CLKinX) since it offers higher operating frequency, better common mode, improved power supply noise rejection, and greater performance over supply voltage and temperature variations."

    Is this the case when a single ended oscillator is used w/ a frequency lower then 200Mhz (maximum input frequency for the OSCin pin).

    If OSCin pin is not used, I assume it can be left floating or terminated to GND similar to the CLKinX inputs?

    Thanks & BR,
    Lev.
  • I recommend to follow Figure 9 to interface the LVCMOS driver to the CLKinX+ input. Like shown in Figure 10, I also recommend to add the biasing resistors (Rb1 & Rb2) to bias CLKinX- to around 1.3 V along with the 0.1uF bypass cap on CLKinX-. This gives the ability to adjust the input switching threshold of the differential input buffer in order to compensate any duty cycle error from the input stage, in case the LVCMOS driver has a slow or asymmetric input clock rise & fall times.

    Unused OSCin/OSCout pins should be left floating.

    Alan