Other Parts Discussed in Thread: PLLATINUMSIM-SW
Hi,
We're trying to work out the following about switching/programming speed. I've used the Ti PLL tool to estimate the loop settling time, but we're not sure about the total "change frequency" time:
Q1. How quickly can we clock in the data from a uP using the SPI bus? How quickly can we program a full set of registers?
Q2. How many (what subset) of the registers are needed to update the frequency (Frac-N and dividers)
Q3. How does the VCO calibration work. Is this automatic? How long does it take?
Q4. What else do we need to understand about the "change frequency" time?
As an example, suppose we wish to change from 1GHz to 10GHz, involving different Frac-N dividers, output dividers, VCOs. How quickly will all this settle. (Approx loop BW is 350kHz)