Hi,
I required a 1:4 clock buffer with sine to square wave converter with low additive phase noise. Required to source Square wave(CMOS) Reference input(10MHz) for 4 PLL's. The PLL supports only square wave input at 10MHz.
In system level i'm getting 10MHz(OCXO) sine wave reference. To use that input in my board, i want to convert sine to square with minimal degradation in phase noise.
If i use sine to square Converter and clock buffer separately. the Additive phase noise is getting increased.
So can i get a single chip with less additive phase noise or any other ways are there to do this.
