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CDCE913: Reference clock for Ethernet PHY

Part Number: CDCE913
Other Parts Discussed in Thread: LMK04906, CDCI6214, LMK00804B, LMK00105

Hi team,

Can CDCE913 be used for the reference clock for Ethernet PHY, even through the PHY doesn't recommend PLL generated clock like 88E1510 as attached file? Thank you for your support. 

Best regards,

Takeshi Sasaki

  • Takeshi-san,

    Looking at this, I see that they want 4 ps input jitter (12k-20MHz). In general, we have devices with integrated PLL that can do better than 50 fs (100Hz-100MHz), so I think that this statement #1 in this datasheet may be very obselete and perhaps from an old datasheet.

    According to the clock architect tool, the CDCE913 is 20 ps of jitter, so maybe this device is too high for jitter (fout=156.25 MHz). Perhaps consider something in the LMK series such as the LMK04906 or the LMK061 family which can easily do <1 ps jitter.

    Regards,
    Dean
  • Hi Dean,
    Thank you for your comments. I have 2 questions. 6 outputs of LMK04906 is too large for the customer application. 3 or 4 output is enough, 1 or 2 can be used. Does any other option like LMK04906 for ethernet phy? Also, does LMK061 mean LMK61? Thank you for your support.
    Best regards,
    Takeshi Sasaki
  • Takeshi-san,
    88E1510 need a 25 MHz 1.8V LVCMOS clock. There are several clock solutions for your reference.
    1. 25 MHz 1.8V LVCMOS XO (not TI's solution)
    2. 25 MHz XTAL + CDCI6214 (a clock generator can provide up to 5 channels of 1.8V LVCMOS outputs)
    3. 25 MHz 3.3V LVCMOS XO + clock buffer (1.8V LVCMOS output, LMK00804B 1:4, or LMK00105 1:5)

    Best regards,
    Shawn