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LMX2595: Harmonic, Sub harmonics and Intermod

Pradeep Kumar68
Intellectual 420 points
Part Number: LMX2595
Other Parts Discussed in Thread: PLLATINUMSIM-SW, , LMX2594

Hi Ti Team,

We are developing RF unit, which has to generate 0.5 to 18 GHz frequency from 10MHz reference signal. We need to achieve -20dBc harmonic rejection and -50dBc Spurious rejection.

For this requirement, we have planned to use LMX2595 PLO. So we evaluated the LMX2595 Evaluation board with below setting.

All readings are taken on port A with doubler=1, PFD=ref=100Mhz, power=20, Charge Pump =15 mA. 

What we have observed is , for frequency above 6 GHz, we are observing subharmonics at power levels of -40dBc.

After 7 GHz we are observing, Subharmonic at -20dBc power level and Subharmonic+Fundamental signal components at -30dBc power level. i.e if we generate 10GHz from PLL, we are observing -20dBc signal at 5 GHz and -30dBc signal at 15 GHz. 

As frequency increase above 15 GHz, we are observing Sub harmonic, sub harmonic of subharmonic and Fundamental +/-  sub harmonic of subharmonic. i.e If we are generating 16GHz, we are observing 16 GHz at -5dbm power level, 8 GHz at -14dBm power level,4 GHz at -37dBm power level and 12 GHz at -51dBm power level.

Is there anyway, we can suppress this subharmonic and harmonic components generated from the PLO?

  • 0
    TI__Mastermind 28021 points

    Pradeep,

    A few things:

    1.  When going below 15 GHz, there should be no sub-harmonic as the doubler is not used.  If you are seeing this, it could be crosstalk if the outputs are not the same frequency.  For instance, if OUTA=15 GHz and OUTB=6 GHz, then you see 6 GHz on OUTA which is really crosstalk from OUTB.   Even if you power down OUTB, you get this crosstalk.  To get rid of this, set OUTA_MUX=OUTB_MUX.

    2.  Above 15 GHz, there are some "magic" settings for the doubler.

    •Change R25 from 0x190624 to 0x190C2B
    I want to revise the datasheet with these new settings, but we need to run it through some qualification, but it helps 1/2 harmonic and output power.

    Regards,

    Dean

  • 0 in reply to Dean Banerjee
    Intellectual 420 points

    Hi Dean,

    Thanks for the reply. It helped us a lot.

    We have one more requirement of achieving 200us Frequency switching.

    Output frequency can be anything between 500-18000 MHz.

    Can you please guide us, what are the design constraint to be followed in order to achieve this switching speed.??

  • 0 in reply to Pradeep Kumar68
    TI__Genius 9920 points
    Is it every 200us need a frequency switching ?
    We should consider register operation time (related with how many registers need to be changed), VCO calibration time (related with calibration mode), and PLL lock time (related with loop bandwidth).
  • 0 in reply to Shawn Han
    Intellectual 420 points
    HI Shawn Han,

    We are not switching frequency every 200us. If there is any change in frequency, lock time has to be within 200us.
    Suppose,if we are changing frequency from 1GHz to 16GHz with 200KHz loop filter, what will be settings to be done to achieve less than 200us lock time.
  • 0 in reply to Pradeep Kumar68
    TI__Mastermind 28021 points
    Pradeep,

    Let's assume that your programming speed is instantaneous. So the most the VCO would have to switch would be 7500 to 15000 MHz.

    If you set the input frequency to 100 MHz and use 200 Mhz phase detector frequency, PLLatinum Sim (ti.com/tool/PLLATINUMSIM-SW) predicts a VCO calibration time of 40 us and analog lock time additional 15 us for about 55 us. So 200 us seems very feasible.

    Regards,
    Dean
  • 0 in reply to Dean Banerjee
    Intellectual 420 points

    Hi Ti team,

    Thanks for the reply,

    We have purchased LMX2595EVM and tested for Subharmonic, For frequency less than 15 GHz there were no subharmonics  if we keep OUTA_MUX=OUTB_MUX, . That is good for us

    But for for frequency above 15 GHz, even after Changing R25 from 0x190624 to 0x190C2B subharmonic did not improve much. There was only 3 dB improvement. So the magic setting didn't really help.

    But when we keep OUTB_MUX as sysref, we observed subharmonic was improved by -10dBm. This should be good enough for our design.

    Going furthur, As I informed earlier we have to generate 0.5 to 18 Ghz from 10 MHz reference. We are using CPROBS5-0010 ref osc as a input reference, which has very good phase noise.

    What we have observed that at 18 Ghz we are only getting -83dbc/Hz @ 100 KHz phase noise. But actually we require -100dBc/Hz phase noise at 100 KHz offset. 

    I have attached .tcs file for your reference.

    Please let me know, is it possible to get  -100 dBc/Hz @ 100 KHz phase noise at 18 GHz by using 10 MHz ref oscillator?

    If yes please let me know the settingshttps://e2e.ti.com/cfs-file/__key/communityserver-discussions-components-files/48/test-file-for-15Ghz-and-above.7z

  • 0 in reply to Pradeep Kumar68
    TI__Genius 9920 points
    According to simulation, 10 MHz reference with 7x multiplier, the max PDF is 70 MHz, it is not enough for LMX2595 to achieve -100 dBc/Hz @ 100 KHz phase noise at 18 GHz. 20 MHz reference could achieve it , but there is no margin. Suggest to have an external 4x or higher multiplier for 10 MHz source.
  • 0 in reply to Shawn Han
    Intellectual 420 points
    Since we cannot change our reference frequency, do TI have any other solution to achieve -100 dBc/Hz @ 100 KHz phase noise at 18 GHz.
    Will any LMK series jitter cleaner will help us?
    Can we use any LMK series jitter cleaner to generate 200 MHz from 10 MHz reference. Then we can use 200 MHz as reference to LMX2595?
    Will it help us to achieve -100 dBc/Hz @ 100 KHz phase noise at 18 GHz?
  • 0 in reply to Pradeep Kumar68
    TI__Mastermind 28021 points
    Pradeep,

    Using an ideal 10 MHz input reference with an infinite loop bandwidth, the LMX2594 can theoretically do -102 dBc/Hz at 100 kHz for 18 GHz.
    Using 0 Hz loop bandwidth (VCO ONly), It predicts about -99 dBc/Hz for 18 GHz.

    So one approach is to try to get this with just the VCO and then the input refernce does not matter. Likely you will be off a dB or two, but it will not depend on the input reference.

    Or the other approach is to use a 200 MHz input reference. If it is perfectly clean, then you can also achieve about -102.4 dBc/Hz at 100 kHz.

    The key is that this input reference has to be clean. If you lock your 200 MHz input reference using any PLL and use that directly, this should be pretty close. Use something with just one PLL stage with a narrow loop bandwidth (PLL1).

    Regards,
    Dean