LMK04208: LMK04208 and LMX2594 configuration for clocking the Xilinx zcu111 RFSoC demo board

David Louton

Part Number: LMK04208
Other Parts Discussed in Thread: LMX2594,

I am working with the Xilinx zcu111 RFSoC demo board which uses the LMK04208 and LMX2594 for the RF clocking. I need help to generate the register files for the following configuration:

Part	Device-Pin	Pin Name	Signal Name	Frequency MHz
LMK04208 Input	U90-36	OSC_IN_P	OSCIN_4208_CMOS	122.880
LMK04208 Output	U90-4	CLK_OUT0_P	SYSREF_FPGA_C_P	Not Used
LMK04208 Output	U90-13	CLK_OUT1_P	SYSREF_RFSOC_C_P	250.000
LMK04208 Output	U90-22	CLK_OUT2_P	FPGA_REFCLK_OUT_C_P	Not Used
LMK04208 Output	U90-48	CLK_OUT3_P	LMX2594A/C_SYNC	122.880
LMK04208 Output	U90-53	CLK_OUT4_P	REFIN_2594A/C_P	122.880
LMK04208 Output	U90-58	CLK_OUT5_P	CLK_4208_OUT5	10.000
LMX2594RHAT Input	U102-8	OSCIN_P	REFIN_2594A_C_P	122.880
LMX2594RHAT Output	U102-23	RF_OUTA_P	RF1_CLKO_A_P	250.000
LMX2594RHAT Output	U102-19	RF_OUTB_P	RF1_CLKO_B_P	250.000
LMX2594RHAT Input	U104-8	OSCIN_P	REFIN_2594C_C_P	122.880
LMX2594RHAT Output	U104-23	RF_OUTA_P	RF3_CLKO_A_P	250.000

This is the first time that I have worked with these kinds of devices. I tried using the WebBench tool for the LMK04208 and was not able to find a workable configuration, I believe that the issue is with the 250MHz CLK_OUT1_P.

If this output can’t work at 250MHz, then there are two options:

1. 1. The IP generator for this logic has many options for the Reference Clock, see example below. This same reference is also used for the DACs. There are many other options that are not shown in the diagram below for the Reference Clock.

2. 2. The TRD example reference design from Xilinx for this board clocked the ADCs at 4.096GHz, it used a Reference Clock of 245.760MHz. I was able to get the WebBench tool to find a solution. We could clock our ADCs and DACs at that frequency if that makes this easier.

I downloaded the TICS Pro version 1.6.8.0, it looks like there is a big learning curve to using that program.

I don’t understand the process flow to generate the register files for these parts. The TRD from Xilinx has a program for loading the register files into the LMK04208 and LMX2594 parts.

Reference materials for the Xilinx zcu111 are located here:

https://www.xilinx.com/products/boards-and-kits/zcu111.html

Schematic: https://www.xilinx.com/member/forms/download/design-license.html?cid=9da5f26d-5d84-4a20-89d8-dc7437705c65&filename=zcu111-schematic-xtp508.zip

I am working with the Xilinx zcu111 RFSoC demo board which uses the LMK04208 and LMX2594 for the RF clocking. I need help to generate the register files for the following configuration:

Part	Device-Pin	Pin Name	Signal Name	Frequency MHz
LMK04208 Input	U90-36	OSC_IN_P	OSCIN_4208_CMOS	122.880
LMK04208 Output	U90-4	CLK_OUT0_P	SYSREF_FPGA_C_P	Not Used
LMK04208 Output	U90-13	CLK_OUT1_P	SYSREF_RFSOC_C_P	250.000
LMK04208 Output	U90-22	CLK_OUT2_P	FPGA_REFCLK_OUT_C_P	Not Used
LMK04208 Output	U90-48	CLK_OUT3_P	LMX2594A/C_SYNC	122.880
LMK04208 Output	U90-53	CLK_OUT4_P	REFIN_2594A/C_P	122.880
LMK04208 Output	U90-58	CLK_OUT5_P	CLK_4208_OUT5	10.000
LMX2594RHAT Input	U102-8	OSCIN_P	REFIN_2594A_C_P	122.880
LMX2594RHAT Output	U102-23	RF_OUTA_P	RF1_CLKO_A_P	250.000
LMX2594RHAT Output	U102-19	RF_OUTB_P	RF1_CLKO_B_P	250.000
LMX2594RHAT Input	U104-8	OSCIN_P	REFIN_2594C_C_P	122.880
LMX2594RHAT Output	U104-23	RF_OUTA_P	RF3_CLKO_A_P	250.000

If this output can’t work at 250MHz, then there are two options:

1. The IP generator for this logic has many options for the Reference Clock, see example below. This same reference is also used for the DACs. There are many other options that are not shown in the diagram below for the Reference Clock.

2. The TRD example reference design from Xilinx for this board clocked the ADCs at 4.096GHz, it used a Reference Clock of 245.760MHz. I was able to get the WebBench tool to find a solution. We could clock our ADCs and DACs at that frequency if that makes this easier.

I downloaded the TICS Pro version 1.6.8.0, it looks like there is a big learning curve to using that program.

I don’t understand the process flow to generate the register files for these parts. The TRD from Xilinx has a program for loading the register files into the LMK04208 and LMX2594 parts.

Reference materials for the Xilinx zcu111 are located here:

https://www.xilinx.com/products/boards-and-kits/zcu111.html

Schematic: https://www.xilinx.com/member/forms/download/design-license.html?cid=9da5f26d-5d84-4a20-89d8-dc7437705c65&filename=zcu111-schematic-xtp508.zip

over 5 years ago

0 Timothy T over 5 years ago

TI__Mastermind 28550 points

LMK04208 for 250 MHz.tcsHello David,

We are going to add a frequency planner to the LMK04208 which I think would make your problem much easier. In the meantime do I understand you need to get 250 MHz from the LMK04208?

Are you using the LMK04208 as a clock generator with a clean reference to produce 250 MHz?
- If so, what is your reference frequency?

or, are you using the LMK04208 as a jitter cleaner with a noisy reference and a VCXO for jitter cleaning?
- If so, what is your reference frequency and VCXO frequency?

Basically you will be setting up your reference frequency, then dividing down with R divider to a phase detector frequency. Then that multiplies up to the VCO/VCXO frequency which is the reference to the second PLL or drives the clock distribution path which the clock dividers will divide down from to get the desired frequency.

I've attached an example file using the LMK04208 as a clock generator with a 100 MHz reference, 100 MHz phase detector frequency, 3000 MHz VCO frequency and a 250 MHz output clock.
> Let me know if I can be of more assistance. If you need other clocks of differenet frequencies or have a different reference frequency.

73,
Timothy

Clock & timing

Clock & timing forum

LMK04208: LMK04208 and LMX2594 configuration for clocking the Xilinx zcu111 RFSoC demo board