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Lock detect time

user5941540
Intellectual 280 points
Part Number: LMX2594EVM

Hi !

I'm making some measurement about the lock detect timing using the Full assist mode, and I cannot explain one phenomenon:

  1. First, I have used the interface in order to program the different parameters for the Full Assist mode. From the frequence F1 to F2, I measured around 20µs between the rising edge of the CSB and the rising edge of the Lock Detect
  2. Secondly, I decided to directly load all the registers corresponding to the frequence F2. To do that, when the PLL was locked on the F1 frequence, I programmed the current charge pump to 0mA, and the I loaded all the register.  The lock detect was activated immediatly after the rising edge of the CSB linked to the R14 (as expected) but this time, I measured a time around 5µs.

So I would like to know if that behavior is normal or not ?

Thanks

Stéphane

  • 0
    TI__Guru** 107260 points
    Hi Stephane,

    What is the setting of LD_TYPE?
  • 0 in reply to Noel Fung
    Intellectual 280 points
    Hi Noel,

    LD_TYPE is let to 0
  • 0 in reply to user5941540
    TI__Guru** 107260 points
    Hi Stephane,

    Can you try again with LD_TYPE set to 1?

    In addition, how many register did you program in bullet (1) and (2)? In (2), I think you were saying register 0x14 (=R20), right? Also in (2), I don't think it is necessary to put the charge pump current to 0.

    Please note that when LD_TYPE is 0, lock detect will return a "1" whenever VCO calibration is completed. The lock detect may remain at 1 even if the PLL is forced unlock (for example, remove the OSCin reference signal). So this lock detect type cannot reliably reflect the actual PLL lock status.
  • 0 in reply to Noel Fung
    Intellectual 280 points
    Hi Noel,

    I'm so sorry, my answer was wrong, LD_TYPE is already set to 1 (I had a confusion with LD_DELAY...)
  • 0 in reply to user5941540
    TI__Mastermind 18070 points
    Hi Stéphane,

    I'm assuming that your question is why is lock time 20us with full assist while the datasheet says 5? Because measurements with charge pump current set to 0 doesn't really mean anything. When charge pump gain is 0, theoretically PLL is shut off and you are only seeing free-running VCO.

    Going back to the 20us question. Please note that the 5us VCO calibration time was characterized using the phase noise analyzer, as shown in Figure 12 of the datasheet. Looking at the distance between rising edge of CSB and rising edge of MUXout pin gives some insight of lock time but this method cannot accurately characterize the device performance.

    Part of the reason is that when you set LD_type to 1, some analog settling time is included before MUXout becomes high. So lock time = VCO calibration time + analog settling time. The 5us is ONLY the VCO calibration time.

    To justify the fact that part of analog settling time is included, you can try this: reduce the loop bandwidth by changing the charge pump gain to 6mA. Now you should see longer time between rising edge of CSB and rising edge of MUXout. This is because by reducing the bandwidth, you can increase the analog settling time.

    The bottom line is, lock detect is mostly used to visualize the lock status. You can estimate the lock time by looking at its output but shouldn't rely too much on it to evaluate the performance.

    By the way, if you set LD_type to 0, then MUXout will always be high under lock detect mode.

    Regards,
    Hao