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LMK04828: PLL2_PRE_PD Semantics

Todd Rockoff
Intellectual 480 points
Part Number: LMK04828
Other Parts Discussed in Thread: DAC38J84

G'day!

What is the effect of powering down N2 Prescaler (0x173[6] PLL2_PRE_PD = 1) ?

Does it bypass the circuit ("prescale by 1"), or does It disable PLL2 entirely?

Hopeful thanks --todd

  • 0
    TI__Mastermind 33760 points

    Hello Todd,

    Powering down the N2 Prescaler by setting 0x173[6] PLL2_PRE_PD = 1 will disconnect and power down the path from the VCO_MUX to the PLL2_NCLK_MUX. This is useful in cases where the input to the PLL2 N divider is derived from the FB_MUX, such as when using Cascaded 0-Delay mode.

    Regards,

  • 0 in reply to Derek Payne
    Intellectual 480 points

    crystal, goodonya Derek.

  • 0 in reply to Todd Rockoff
    TI__Mastermind 33760 points
    Hello Todd,

    One more important thing: PLL2 performs frequency calibration to compensate for temperature drift whenever the PLL2_N register value is programmed. Frequency calibration uses the N2 prescaler, regardless of which mode is used. So whenever a setting is changed for PLL2 which could affect the frequency (N divider or R divider change, reference frequency change, etc), set PLL2_PRE_PD=0 and PLL2_PD=0, then program PLL2_N again to ensure proper VCO frequency calibration. After frequency calibration is complete, the N2 prescaler may be powered down again if it is not used.

    Regards,
  • 0 in reply to Derek Payne
    Intellectual 480 points
    Thank you Derek for this followup.

    This point brings up a related question (not sure if there should be a separate thread):
    The junction temperature of the DAC38J84 next to LMK04828 varies over a wide range; presumably the LMK's temperature is changing as well.
    Under what conditions should one recalibrate PLL2?

    Hopeful thanks --todd
  • 0 in reply to Todd Rockoff
    TI__Mastermind 33760 points

    Hello Todd,

    The purpose of frequency calibration on the LMK04828 PLL2 is to select the best VCO characteristics at the target frequency, such that continuous lock can be achieved across the operating temperature range. This is captured by the specification |ΔTCL| (Allowable Temperature Drift for Continuous Lock) in the datasheet electrical characteristics. Based on this spec, you should be able to perform frequency calibration at -40°C, lock at -40°C, and remain locked after increasing ambient temperature to +85°C. Likewise, you should be able to perform frequency calibration at 85°C, lock at 85°C, and remain locked after decreasing ambient temperature to -40°C. Essentially, the initial frequency calibration remains valid across the entire operating temperature range.

    If the VCO target frequency changes for any reason (change R divide, change N divide, change reference input, etc), the VCO characteristics will change to accomplish the new lock and frequency calibration should be performed again. Frequency calibration is triggered by programming the N divider, so the N divider should be programmed last after all other parameters affecting PLL2 frequency.

    Regards,

  • 0 in reply to Derek Payne
    Intellectual 480 points

    Great thanks, Derek, for going above and beyond with this enlightening tutorial regarding the effect of calibration across temperature w.r.t. the initial locking conditions.


    Cheers --todd