LMX2581E: LMX2581E phase noise is abnormal

PENG YUAN

Part Number: LMX2581E

Hello！

I use LMX2591E as the LO of the down-conversion receiver, the frequency range is 1690MHz~1990MHz, step 0.25MHz, and the phase noise is abnormal in the range of 1879MHz~1881MHz. 1880MHz is typical as shown in the figure above, and the other frequencies are normal, I tried to change the wider loop but did not improve, the current Fpd is 100MHz and the loop bandwidth is 30KHz. I consulted the PDF and found that the frequency range of 1879MHz~1881MHz is the transition band between VCO direct output and bisection frequency. Is it a defect of the device itself or a problem of my configuration? Could you please help me to do the test?

best regards

over 7 years ago

0 Noel Fung over 7 years ago

TI__Guru** 120050 points

Hi Peng,

Could you provide your configuration in TICS Pro format?

0 PENG YUAN over 7 years ago in reply to Noel Fung

Prodigy 90 points

Hi Fung

Yes, the figure above is our configuration register.

0 Noel Fung over 7 years ago in reply to PENG YUAN

TI__Guru** 120050 points

Hi Peng,

Could you also provide the screen shot of the PLL and User Controls pages?

0 PENG YUAN over 7 years ago in reply to Noel Fung

Prodigy 90 points

Hi Fung

The above is our basic configuration, please have a look.

0 Noel Fung over 7 years ago in reply to PENG YUAN

TI__Guru** 120050 points

Hi Peng,

Please try disable FRAC_DITHER.

0 PENG YUAN over 7 years ago in reply to Noel Fung

Prodigy 90 points

Hi Fung

I try disable FRAC_DITHER, the phenomenon remains the same, debugging did not solve for a long time.

At present, the phenomenon of 10 channels is exactly the same. Would you please help me test it?

At the same time, I found another LMX2581SQ on TI's official website, and did not find the difference between them from the data manual. I actually tested and compared the phenomenon of devices LMX2581SQ and LMX2581ESQE, which was the same as the first picture posted, and the frequency was also around half the frequency output of VCO.

0 Noel Fung over 7 years ago in reply to PENG YUAN

TI__Guru** 120050 points

Hi Peng,

Here is the test result. I used the same register settings as yours.

0 PENG YUAN over 7 years ago in reply to Noel Fung

Prodigy 90 points

Hi Fung

Oh, I see that your side of the test results are very good, could you please send your side of the peripheral circuit structure?I found that changing the loop filter worked, but it was not obvious, I got it in strict accordance with TI PLLatinum software simulation, without any changes.

thanks a lot.

0 Noel Fung over 7 years ago in reply to PENG YUAN

TI__Guru** 120050 points

Hi Peng,

I was using the EVM, you can get started with the default EVM loop filter.

0 PENG YUAN over 7 years ago in reply to Noel Fung

Prodigy 90 points

Hi Fung

I have changed several sets of loop filter values, and the problem still exists. I think the problem is not in the code, but probably related to the hardware circuit, so could you please give me a reference? I don't know how to explain to the leader.

Sorry to have bothered you so much

thanks！

0 Noel Fung over 7 years ago in reply to PENG YUAN

TI__Guru** 120050 points

Hi Peng,

I don't have your board, I could only make some guess for you.

1. where is the reference clock came from?

2. were you using LDO to power up the reference clock?

3. is there 1.88GHz modulated signal in your board?

4. Did you note the layout requirement for the loop filter? See datasheet section 8.3.7. for details.

0 PENG YUAN over 7 years ago in reply to Noel Fung

Prodigy 90 points

Hi Fung

I have the layout on the reference materials, above is my outside and layout,

0 Noel Fung over 7 years ago in reply to PENG YUAN

TI__Guru** 120050 points

Hi Peng,

Looks you have a LC balan at the output and use this balun to provide the current to the buffer. I think this is not correct.

The output is an open drain differential buffer. First of all, the pull-up on the + and - pin must be identical. Secondly, the load to these pins should also be identical. At last, the output impedance is not 100ohm (differential). You cannot assume the output is 100ohm and therefore build a 100ohm-to-50ohm balun.

If you only need a single output, you should have both pins pull-up with the same value of inductors or resistors. The unused pin should be AC-coupled to a 50ohm shunt resistor.

Clock & timing

Clock & timing forum

LMX2581E: LMX2581E phase noise is abnormal