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LMK05028: Dose the Timing IC support to use on 5G device

user6059029
Prodigy 30 points
Part Number: LMK05028

We have a 5G device project, need a timing IC.We need the Timing IC support 1588/SyncE/GPS input.Dose the LMK05028 support it?

One more question:

What is the differenc between TCXO_IP input and XO input?Which input should be chose when the divice work on the free-run mode, TCXO or XO?

  • 0
    TI__Mastermind 33430 points

    Hello,

    The LMK05028 does support 1588/SyncE/GPS input. We have an application note demonstrating characterization of the LMK05028 for ITU-T G.8262, which may be helpful. I also recommend looking at table 3 in section 9.2.5 of the datasheet for example applications and configurations which support them.

    The TCXO input is a reference to the DPLLs, whereas the XO is a reference to the APLLs. In free-running mode, for maximum frequency accuracy and minimum wander, the device should reference the TCXO. The XO is still used in all cases for internal state machine clocking, but it is not expected to be a highly accurate frequency reference.

    Regards,

  • 0 in reply to Derek Payne
    Prodigy 30 points

    Two question need be helped：

    Q1: Is there any question that the LMK05028 is used on 5G device? If the LMK05028 can meet the 5G timing requirement?

    Q2: The timing need meet 0.1ppm frequency accuracy and stability in free-run or holdover modes ,  Which local OSC should be chose ,TCXO or OX?

  • 0 in reply to user6059029
    TI__Mastermind 33430 points

    Hello,

    1. The LMK05028 is used in 5G systems. The LMK05028 will meet timing requirements for SyncE (G.8262), SONET/SDH (Stratum 3/3E, G.813, GR-1244, GR-253), IEEE 1588 PTP Slave Clock or Boundary Clock, or OTN (G.709). If you require any of these timing standards in your 5G system, the LMK05028 can meet these 5G timing requirements.
    2. The free-run accuracy is set by the oscillator accuracy, so the simple way to meet 0.1ppm frequency accuracy and stability is use an OCXO with at most 0.1ppm as the TCXO input. Holdover starts with the accuracy of the TCXO input, and can be improved by locking to a valid reference input with higher accuracy than the TCXO to generate an averaged tuning correction for the TCXO input from the accumulated history of tuning words. See section 9.3.8.5 of the datasheet for more holdover information. Do not use the XO as the free-run/holdover frequency reference.

    Regards,

  • 0 in reply to Derek Payne
    Prodigy 30 points

    Hello,

    There are two PLLs in LMK05028, we will use the PLL1 to output 156.25M/125M, and use PLL2 to output 161.1328M. 1588 & SyncE & GPS as the input source to LMK05028. Basic on this application, below question please help on it,thanks!

    1.How long can the LMK05028 keep holdover status?Is there enough holdover time  when changed the input source?

    2.When the LMK05028 work on the DCO mode(1588), it look like the REF DPLL is not work. How long dose the DPLL work again when changed timing source from 1588 to another mode?  Is there any question that the timing source changed from 1588 mode to another mode?

  • 0 in reply to user6059029
    TI__Mastermind 33430 points

    Hello,

    1. Holdover status can be maintained indefinitely.
    2. This depends on the validation timers used, and how quickly the new timing source can be validated by the input monitors. For example, it will take longer to establish a PPM accuracy level than to check for an accurate slew rate. These timings are not characterized because there are many different input frequencies and validation timer combinations which are considered valid, and holdover can maintain adequate frequency accuracy during the period where the REF DPLL is not locked. You can measure this time for your use case by using the status outputs to display the DPLL1 holdover active status; this is an accurate representation of the holdover duration to within about 100ns.

    Regards,