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LMH1983: TOF1_Sync_Slew setting

Guru 19785 points
Part Number: LMH1983


Hi Team,

Please allow me to clarify about the LMH1983 TOF1 behavior. Could you please confirm whether my following recognition is correct ?

1). If the phase relation between TOF1 and FIN is inside 2 lines (+/- 2 Hsync window), LMH1983 will control VCXO input high or low whichever is closer for alignment. (REG 0x11 [3:2] setting is ignored.)

2). If the phase relation between TOF1 and FIN is outside 2 lines (+/- 2 Hsync window), Drift lock always controls the VCXO input voltage based on the REG 0x11 [1] setting to achieve frame alignment.

Best Regards,
Kawai

  • Hi Kawai,

    I'm not very familiar with device and I wonder which part of datasheet indicates point 1) that R0x11[3:2] will be ignored.

    Regards,

    Hao

  • Hi Hao-san,

    That is the behavior what I see with the EVM.

    The device seemed to drifted smoothly to HIN for alignment on both ways, making 27MHz VCXO clock faster "AND" slower.

    I believe, if TOF1 is outside of 2H period, drift lock would only moves to the direction which set to TOF1_Sync_Slew.

    It was better if the device was smarter to judge and drift to the closer direction even if the phase difference is outside the 2H period.

    Best Regards,

    Kawai

  • Hi Kawai,

    According to a former team member, this was a behavior intended for the design. The LMH1983 shouldn't have "smart logic" to judge how to best advance or delay the VCXO frequency to achieve fastest frame alignment when the new reference is applied.  That seems to be a limitation of this APLL-based design.

    Regards,

    Hao

  • Hello Hao-san,

    Based on my test, I can see the device advances or delays VCXO frequency when forced to drift lock mode and the phase difference is inside +/- 2H period.
    When the phase difference is inside +/- 2H period, the device does not follow REG 0x11 [1] setting and seems it is achieving fastest frame alignment.
    Is this behavior intended for design ? It seems like the device is having a smart logic in this condition.

    Could there be a bug in the GUI I used, which is Analog Launch PAD that the setting would not be correctly applied ?
    I believe you could see the same symptom with your LMH1983EVM.
    I had selected both TOF1 Sync Near/Far to drift lock (clean), then disconnected (Free-Run at certain control voltage) and connected (GenLock) the analog reference input.

    Here I've selected TOF1 Sync Slew = Slow Down, however, we observed VCXO frequency speeding up for alignment.

    Best Regards,

    Kawai

  • Hi Kawai-san,

    I will order an EVM, but I probably won't be able to provide more information than what's on the datasheet.

    Regards,

    Hao

  • Hi Hao-san,

    This is the link to the EVM.

    http://www.ti.com/tool/SD1983EVK

    We just wanted to clarify whether our test result is behaving correctly or not in the device design point of view.

    Best Regards,

    Kawai

  • Hi Kawai-san,

    Sorry for the delay. I was out of office. I just received the EVM. Please allow me some time to verify this

    Regards,

    Hao

  • Hello Hao-san,

    Thanks for the support.

    I was wondering why this device post is categorized to "Interface Forum", because LMH1983 is Clock and Timing device.

    Best Regards,

    Kawai

  • Hi Kawai-san,

    Could you point out where this device is categorized to "interface forum"? Currently this part is assigned to our product line (Clock and Timing Solution).

    Regards,

    Hao

  • Hi Hao-san,

    You can see this thread belongs to "Interface Forum" in below picture or top of this page.

    When posting, the system automatically categorized LMH1983 to Interface forum. I think it better to modify the system.

    Best Regards,

    Kawai

  • Hi Kawai-san,

    Sorry for the delay. Please expect the answer by next week.

    Regards,

    Hao

  • Hi Hao-san,

    Thanks for the support.

    Could you please also confirm the designer about this behavior ?

    Best Regards,
    Kawai

  • Hi Kawai-san,

     I can help locate some information. Here's the description I found for 0x11:

    Regards,

    Hao

  • Hi Hao-san,

    I understood your situation. However, if that is the case, who should we ask for this question ?

    My recognition is that "TOF1_SYNC_SLEW" sets the direction either to increase or decrease the VCXO frequency (control voltage) to align the input and output frame. However, what we see is that this setting is not working when the phase difference is under 2H period. It seems that the device is smart choosing the direction which phase difference is smaller, which would be better for users, but, only smart at under 2H period.

    Can we say that LMH1983 always behaves this way ?

    Best Regards,

    Kawai

  • Hello Kawai,

    Thank you for pointing this out, we will work with E2E team to sort out the correct forum.

    Regards,

    Liam

  • Hello Kawai,

    As Liam mentioned working with the E2E Team to get this device to the associated Forum, I have ensured that the LM198x devices do indeed get posted in the Clock&Timing Forum. Regardless of the Forum designated, rest assured that your initial inquiry and subsequent details and observations have been at the attention of the Clocks&Timing Product Group. They will continue to address your questions and provide support for this LMH1983 application.

    Thank you for your feedback and for using E2E.

    ~Leonard

  • Hello Kawai,

    It has taken some time to sort through all the relevant documentation, so I apologize for the delay.

    We believe the observed behavior you mention is correct, however we do not have any characterization data on this specific condition.

    We are still looking into details of the designs and will let you know by end of this week if there is more information we can provide.

    Regards,

  • Hi Kawai,

    Is this closed?

    What are the values of Registers 0x11 and 0x15? What is the H frequency? First, we need to understand how the device is configured.

    After I understand the configuration, we can analyze the results. Were any measurements captured? Could you share the results? 

    Kind regards,
    Lane

  • Hi Liam-san, Lane-san,

    We have request to clarify this behavior if this is correct or not from the device design side. So, please allow me to close the post when this is confirmed.

    LMH1983EVM is operated as following setting (REG 0x11=0x26 or 0x24) with TOF1 enabled (REG 0x0A[0]=1).
    Input video format is NTSC (480i/29.97). I believe input video format does not matter.

    With the above setting, please monitor HIN, FIN, and TOF1 waveform and try disconnet and connect (re-apply) the input video. You could see the device tries to align TOF1 to FIN/HIN to same direction even if you change the TOF1 Sync Slew setting. it seems the Sync Slew setting is ignored. Could you please check ?

    If Sync near and Sync far are both set as "Clean", Sync slew setting seems to be acting correctly.

    Best Regards,

    Kawai

  • Hi Kawai,

    Let's continue the discussion offline.

    Kind regards,
    Lane