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LMK04828: Analog delay

Part Number: LMK04828
Other Parts Discussed in Thread: LMK04832

I have a question about how the analog delay works. On the datasheet, it lists an analog delay of 25 ps, but with a minimum 500 ps. Doesn't this mean that the smallest analog delay possible is 500 ps?

Also,to enable the analog delay, I first set register 106 to 0x00, and then register 103 to 0x0f. Is this correct? Is that it? When does the delay happen?

Thanks

  • Hi Stephen,

    1. Enabling analog delay activates a circuit path with a minimum delay of 500ps. Up to 575ps of additional delay can be added to this path, for a total of 1075ps maximum.
    2. For CLKout0, setting register 0x106[4] = 0 activates the analog delay path on the DCLK outputs. Setting register 0x103 = 0x0f uses the analog delay path, includes the duty cycle correction and half-step tuning paths (recommended), and sets the analog delay to 525ps (500ps min + 25ps from DCLKout0_ADLY setting). Your programming sequence will correctly enable and configure the output for analog delay. Analog delay updates immediately after being programmed. If a SYNC signal was used to establish a deterministic phase relationship between the outputs, changing analog delay settings may invalidate the previous determinism. The exception is if a SYNC signal is issued after analog delay and glitchless analog delay are enabled: changing analog delay values by one step with glitchless analog delay enabled should not affect phase determinism.

    One other thing to note: The value of the analog delay will drift over temperature. The size of this drift is unspecified in the datasheet, but I have seen this value exceed one step size across temperature. If this amount of shift over temperature is not acceptable for your application, consider the LMK04832 which has much better analog delay drift over temperature (<1 step size).

    Regards,