TLC555: Absolute Max spec

Gibson Kim

Part Number: TLC555

Hello,

Can you please advise what concern/consequence there is if applying >VDD in RESET pin?

For example, RESET signal to TLC555 is 3.5V whereas VDD=3.3V. This seems to be Absolute max spec violation, but concerning VDD can go up much higher, I am wondering if 3.5V at RESET is really a concern.

Please advise. Thanks!

over 7 years ago

0 Ron Michallick over 7 years ago

TI__Guru**** 174826 points

Gibson,

If RESET < VDD + 0.3V at all times including overshoots, transients, and system fault conditions, then it would be OK.

If RESET > VDD + 0.3V at any time, how much greater would be the voltage and at what impedance (or peak current) could occur?

0 Gibson Kim over 7 years ago in reply to Ron Michallick

TI__Prodigy 420 points

Hi Ron,

Thanks for quick advice.

The peak current at the RESET pin can be as high as 10uA.

Also, let's assume a bit of margin for the 3.5V of voltage level - can you please advise based on 5% margin (3.675V)?

Thanks!

0 Ron Michallick over 7 years ago in reply to Gibson Kim

TI__Guru**** 174826 points

Gibson,

While it is not permitted by the data sheet, I expect the stress to the device to be insignificant; even if this occurred frequently or continuously. .

0 Gibson Kim over 7 years ago in reply to Ron Michallick

TI__Prodigy 420 points

Hi Ron,

Thanks for advice Well understood.

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TLC555: Absolute Max spec