Hi team,
how to design with 3.3V LVCmos INPUT? Do we have some recommend circuit for 3.3v Lvcmos input? Thanks.
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Hi team,
how to design with 3.3V LVCmos INPUT? Do we have some recommend circuit for 3.3v Lvcmos input? Thanks.
I would not recommend a 3.3V LVCMOS input as the input voltage could exceed the recommended operating maximum. Consider using a level shifter or clock buffer to translate the levels.
A simpler alternative would be to create a voltage divider using large resistors to attenuate the signal level, however this is not recommended in many cases as it can have a negative impact on signal integrity. You could simulate the signal integrity using the IBIS model.
Kind regards,
Lane