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TLC555: Absolute Max on output pin

Yosvany Rodriguez
Prodigy 20 points

Part Number: TLC555
Other Parts Discussed in Thread: STRIKE

I am looking at an external voltage transient such as from lightning applied to the output pin. What is the absolute maximum voltage that the output pin can withstand without permanent damage to the device?

  • 0
    TI__Guru**** 171006 points

    Hello Yosvany,

    From your question, I assume that the output pin leaves the printed circuit board through a connector and cable. The connector and cable can be exposed to surges, ESD, and indirect lightning. Clearly a direct lightning strike to the output pin will be severe permanent damage. 

    The output voltage must always be within the power supply rails. If the output exceeds the power rails, parasitic output pin current will flow and some unspecified (because it is not known to me) current flow could cause permanent damage. The amount of current to create damage varies with stress profile applied, stress duration, and even board layout. Lower supply voltage including 0V (off) is more resilient as the data sheet 'table 2' would also suggest indirectly. The components in figure 27 of data sheet are a good starting point. 

  • 0 in reply to Ron Michallick
    Prodigy 20 points

    Hello Ron, thanks for you answer. The output pin leaves the circuit card and there is a couple of series components that limit transient currents. The lightning would not be a direct strike, but rather some residual voltage from what gets induced in the cable through the cable shield. Still some potential to go a little over the supply rail for a short period of time. I see some pins such as Vdd can go up to 18V. Can this be the case for output pins as well?

    What is the output impedance when the output is High?

  • 0 in reply to Yosvany Rodriguez
    TI__Guru**** 171006 points

    Yosvany,

    The discharge pin is open-drain so its voltage is not limited by the VDD supply. All other pin voltages are limited by the Vdd as there are current flow paths from the other pins to VDD. VDD might increase as well. In the same way, any pin that is negative relative to GND pin will have a current flow path to GND and turns on transistors that can steal current from VDD too.

    The impedance with output high is shown in figure 6, however this doesn't apply to output voltage outside the power rails. I can do a quick output pulse test beyond the power rails next week and share the results. This will be sample data and may not reflect the population performance. What is the planned VDD voltage?

  • 0 in reply to Ron Michallick
    TI__Guru**** 171006 points

    Yosvany,

    I tested output voltage greater than VDD (supply voltage) up to 100mA (pulsed 1ms on, 100ms off) , with VDD = 5V.

    No obvious damage occurred. Nevertheless this is just room temperature, one device, sample data. The lower the current, the better with zero current prefered.

    The input impedance of the output pin was 5.35 ohms during most of the curve

    65% of the current into the output pin flowed out the VDD pin.