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LMK03328: 400KHz spur appear in the outputs

Laurie Fung
Prodigy 120 points
Part Number: LMK03328

From the diagram in section 10.2 Functional Block Diagram (page 27), it indicated OUT7 outputs can be connected to the PRIREF input. Our design use this connection, we see a 400KHz spur at the OUT7 10MHz output but the PRIREF 10MHz input does not have this 400KHz spur. We need to understand how this spur get generate?

Thanks,

Laurie

  • 0
    TI__Mastermind 18070 points

    Hello Laurie,

    Output 4 to 6 can also bypass PLL and output PRIREF. Can you check if the 400kHz spur only appears on output 7 or does it appear on other outputs as well? When using PLLs in integer mode, do you see a similar spur?

    Regards,

    Hao

  • 0 in reply to Hao Z
    Prodigy 120 points

    We did check OUT2 output and did see the 400KHz spur around -99dbc below the carrier frequency of 19.2MHz.

    In the attachment is our .tcs file. Can you check if the OUT7 is bypass the PLL or not?

    Thanks,

    Laurielmk_reg_list_IDO_18_9_19.tcs

  • 0 in reply to Laurie Fung
    TI__Mastermind 18070 points

    Hi Laurie,

    I'll take a look at this in the lab and get back to you by tomorrow 

  • 0 in reply to Hao Z
    TI__Mastermind 18070 points

    Hi Laurie,

    I didn't see any sign of spur at 400kHz. I assume that you are not using TI EVM, so please check if there's any external 400kHz on your board. I adjusted some registers to improve device performance: lmk_reg_list_IDO_18_9_19_TI.tcs

    Regards,
    Hao

  • 0 in reply to Hao Z
    Prodigy 120 points

    The 400KHz spur was observed in the LMK03328 OUT7 in our board (not in the TI EVM). We will look around our board to see where it come from.

    What registers you adjusted to improve this device performance?

    Thanks,

    Laurie

  • 0 in reply to Laurie Fung
    TI__Mastermind 18070 points

    It's been a few days and I don't remember exactly what I changed. But I probably changed quite a few. You can compare the two .tcs files in Winmerge. (Check which registers are different and find those registers in Ticspro or datasheet)

    Regards,
    Hao

  • 0 in reply to Hao Z
    Prodigy 120 points

    In the attachment is the capture of 19.2MHz (out2) single ended clock, it shown there is 400KHz spur. This clock is generated from this clk_config_012319_LB_from_TI.tcs file.

    The latest lmk_reg_list_IDO_18_9_19_TI.tcs from you does not have this 400KHz spur. We need to understand how to avoid getting any spur generate. Can you highlight what area was change to eliminate this spur?

    Thanks,

    LaurieLMK03328_400KHz_spur.pdfclk_config_012319_LB_from_TI.TCS0842.lmk_reg_list_IDO_18_9_19_TI.tcs

  • 0 in reply to Laurie Fung
    TI__Mastermind 18070 points

    Hi Laurie,

    Just to be clear, there are three versions of configuration. The original version that you sent me doesn't produce a 400kHz spur (it generates other spurs though). The "clk_config_012319_LB_from_TI" that you just sent does contain the 400kHz spur. And the version that I sent you optimized the loop filter settings and so on. In general, the reason why there's a 400kHz spur is that the PLL fractional order was set to 1st order when it's supposed to be 3rd order. The theory behind this a little complicated to explain but you can refer to some PLL literature such as Dean Banerjee's PLL book if you are interested.

    In general, instead of trying to figure out the PLL setting yourself, use the Wizard page for frequency planning. It's been tested and is quite reliable. That's actually what I did to generate that profile. Download the latest version of Ticspro if you don't see that page. When there are multiple options, choose the one that has the highest "score".

    Regards,
    Hao