LMX2581: LMX2581 unlock issue in 0_delay mode

Wong

Part Number: LMX2581

Hi,there

I have a question about zero delay mode on the LMX2581 frequency synthesiser. the detailed setting is as below

we follow the below setting sequense:

1.I am trying to follow the instructions from the LMX2581 datasheet(Section 8.5.2 Recommended Initial Power on Programming Sequence )

2.wait PLL locked(It is locked)

3. follow the instructions from the LMX2581 datasheet (Section 8.3.10 0-Delay Mode) regarding putting the LMX2581 into 0 delay mode.

(1)program R0 register ,enable NO_FCAL=1

(2)program R5 register ,enable 0_DLY = 1

(3)Progam R0 register,change PLL_N value from 24 to 1;

4.wait PLL locked(Actually,It is not locked)

Our problem:

1.when move to 0_delay mode ,the PLL is not locked

2.what's the meaning "Program the PLL_N value with PLL_N* / VCO_DIV, where PLL_N* is the original value " in datasheet(Section 8.3.10 0-Delay Mode)

3.could you give me a detailed setting sequence in 0-delay mode?

Best regards,

Wong

over 5 years ago

0 Noel Fung over 5 years ago

TI__Guru* 94660 points

Hi Wong,

The suggested sequence in the datasheet is correct.

In this case, when you enable 0-delay mode, the N-divider is changed from 24 to 1. (PLL_N* (normal mode) = 24, VCO_DIV = 24, so PLL_N (0-delay mode) = 1). However, the lower limit of N-divider is 7 in integer channel (NUM = 0). I think this could be the reason why it did not lock.

Please try set R=8 so that fpd = 15MHz. This would make PLL_N* = 192 and PLL_N = 7.

0 Wong over 5 years ago in reply to Noel Fung

Intellectual 570 points

Noel,

Thank you very much

Best Regards,

Wong

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LMX2581: LMX2581 unlock issue in 0_delay mode