CDCE6214-Q1: Frequency calculation

Hi Akshay,

They are not exactly the same. We will get back to you in next week. 

Hello Akshay,

It is just common PLL frequency calculation: f_VCO = PFD * (N + NUM / DEN), and f_out = f_VCO / PS / CH_DIV. Where f_VCO is VCO frequency; PFD is Phase Frequency Detector frequency; N is feedback N divider; NUM is numerator of fractional feedback divider and DEN is denominator; f_out is output frequency; PS is prescalar (first stage divider after VCO); CH_DIV is channel divider. 

I recommend downloading Ticspro to understand how the device works. http://www.ti.com/tool/TICSPRO-SW

Regards,
Hao

Hi Hao,

Thanks for frequency calculations. I am trying to generate 2.3203125 MHz frequency from 74.25 MHz oscillator.

I configured registers as below:

ip_rdiv = 2,  So f_PFD = 37.125

PLL_NC = 65, PLL_NUM = 5, PLL_DEN = 1,   So f_VCO = 2598.75 MHz

PLL_PSA = 1, ch1_iod_div = 224

Using above configuration expected output frequency is 2.3203125 MHz but I am getting 2.18772 MHz at output. Please help why there is difference in frequency? Frequency also changes by changing MASH_ORDER value.

Is there version of Ticspro that works on linux platform?

Thanks,

Akshay

Hi Akshay,

No we don't have a linux version of Ticspro. Please check two things. 

1. Make sure to either write a '1' to bit "recal" R0[4] or a bit to bit "swrst" R0[2] after changing the frequency setting. The former is VCO re-calibration and the latter is software reset. Both can initiate VCO re-calibration.

2. Read back bit "lock_det" R7[0] to make sure that the PLL is locked.

Regards,
Hao

Also, PSA only be 4, 5 or 6. Check out the latest programming manual: http://www.ti.com/lit/ug/snau247b/snau247b.pdf

Regards,
Hao

And by the way, 2598.75/37.125 = 70. I guess you can just set integer N divider to 70?

Regards,

Hao

In case the equation wasn't clear, N + NUM / DEN means N + (NUM / DEN)

Regards,
Hao

I done VCO re-calibration and read back bit "lock_det" R7[0], value of R7[0] = 1. Still not getting required frequency.

I set register bits PLL_PSA = 1 ( PSA value = 5).

Using N + (NUM / DEN) equation.

Thanks,

Akshay

Any updates..

Hi Hao,

I got required frequency using N = 70, PLL_NUM = 0 and PLL_DEN = 1.

But according to formula N = 65, PLL_NUM = 5, PLL_DEN = 1 OR N = 65, PLL_NUM = 10, PLL_DEN = 2 should also give required frequency. By making PLL_NUM = 0, we are making (NUM/DEN) factor 0. What is use of PLL_NUM and PLL_DEN.

Thanks

Akshay

Hi,

Thanks for explanation.

Is Integer mode or fractional mode is decided using MASH_ORDER bit of R27 Register? I am using MASH_ORDER = 2. What is meaning of 1st Order, 2nd Order and 3rd Order Modulator and how it affect ouptut?

Thanks,

Akshay

Any updates..