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LMX2592: Readback of register values does not return "default" values from datasheet?

Part Number: LMX2592

Hello,

We are trying to configure the LMX2592 using its SPI interface.  We believe the SPI interface is working correctly because we've successfully written multiple registers and read back the written value.  But we've noticed that when you do a read back of all registers immediately after power-up or after a soft reset (i.e. without ever writing them), some of the read values do not match the register "default" values listed in the LMX2592 Datasheet Rev. F (Nov 2017) Figure 22 - Register Table.  For example:

Reg2 readback gives 0x0D00, not 0x0500 default value

Reg7 readback gives 0x00B2, not 0x28B2 default value

Reg8 readback gives 0x1000, not 0x1084 default value

We verified the markings on the chip to confirm that the part is really the LMX2592 and not some variant thereof. Is LMX2592 Datasheet Rev. F (Nov 2017) the latest datasheet update?  Is it necessary to program every single register listed in the table? (in other words, the registers do not really default to "default" values given in the datasheet after a power cycle or soft reset?)

Any suggestions you can give are greatly appreciated.

-Ted   

   

  • Hi Ted,

    The fixed values as shown in the Register Map are the values that we have to write to the device, they are not necessary be equal to the Reset or POR values.

  • Hi Noel,

    Thanks very much for the prompt response. Just to confirm: We should be programming EVERY register in the device with the default values given in Figure 22 for all undescribed register fields, as well as configuring the various described register fields as needed to fit our application? I assume that this register configuration should occur after the soft reset is applied but before the frequency calibrate is done, as described in Datasheet Sect. 7.5.1)?

    Thanks again,

    Ted

  • Hi Ted,

    Correct, after the device is powered up, we recommend write all register once. 

    Step 3 in section 7.5.1 is to ensure that all the registers are reset to their silicon default values, in case the internal POR is not success.