Other Parts Discussed in Thread: LMK04826,
Hi,
Please advise what is the additive phase noise of LMK04832 and LMK04826 in the frequency of 1920MHz at PLL bypass mode?
I couldn`t find the value in the datasheet.
Thanks,
Asaf
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Without input clock phase noise conditions, we can't tell the buffer additional jitter.
Focus on the spec. Noise floor of the buffer. Here is from LMK04832 or LMK04826.
Because we didn't have enough data, only refer to LMK04832.
"• Ultra-Low Noise, at 2500 MHz:
– 54 fs RMS Jitter (12 kHz to 20 MHz)
– 64 fs RMS Jitter (100 Hz to 20 MHz)
– –157.6 dBc/Hz Noise Floor
• Ultra-Low Noise, at 3200 MHz:
– 61 fs RMS Jitter (12 kHz to 20 MHz)
– 67 fs RMS Jitter (100 Hz to 100 MHz)
– –156.5 dBc/Hz Noise Floor"
At 1920 MHz, the noise floor would be not worse than at 2500 MHz. So you can use -157.6 dBc/Hz to estimate the additional jitter on your reference.
For LMK04826, the buffer path didn't be optimized for so high frequency, the noise floor would be worse than LMK04832.
Suggest to evaluate LMK04832 for your application.