LMX2592: Anyway to disable output signals before writing the control registers

I am a little confused by the LMX2592 data sheet. My concern is what is driven out of the clock outputs immediately after the device comes out of reset. In my case the OSC In inputs are driven with a 50 MHz LVDS signal.

From reading the default values shown in the LMX2592 datasheet, I would expect Out A to be outputting a signal with a power level of 15 while the Out B signal being powered down. Is this correct? Am I missing something?

Is there anyway that I can come up with no signal output until I've written all the registers?

Thanks,

Doug Bailey