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CDCM7005: PDN Decap Fmax.

Naveen kumar
Prodigy 70 points

Part Number: CDCM7005

how to calculate maximum frequency for target impedance in PDN Decap analysis.

  • 0
    TI__Mastermind 18070 points

    Hi Naveen,

    The primary purpose of the capacitor on PDN pin is to reduce the ramp time, because the ramp rate of PDN pin should not be faster than that of VCC or AVCC (described in pin description section). The shunt capacitor and internal 150kOhm pullup resistor form a low pass filter. The ramp time of this pin is dependent on the bandwidth or RC time constant.

    For example, if the capacitor value is 0.01uF, then time constant is 0.01e-6*150e3 = 1.5ms, meaning that PDN pin ramps up to 63% of its final value in 1.5ms.

    Regards,
    Hao

  • 0 in reply to Hao Z
    Prodigy 70 points

    increasing ramp is one of the application of decap capacitor, it also use for compensating transient current, means due to the load fluctuation load current also varies with little voltage that time Decap will supply the transient current.

  • 0 in reply to Naveen kumar
    TI__Mastermind 18070 points

    Hi Naveen,

    Just realized that by PDN you mean power delivery network. I thought you were talking about the bar{PD} pin. Unfortunately I'm not familiar with power delivery analysis. Can you be more specific about what chip spec that you need for the analysis? I'm not sure what you mean by maximum frequency for target impedance.

    Regards,
    Hao