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LMH1983: PLL2 at half fq on power up

james newman
Prodigy 20 points
Part Number: LMH1983


On a small number of our boards (maybe 1%)  a small proportion of times (<1%) after power-up the output of PLL2 is at half speed (74 MHz). Can you suggest what may be causing this to happen.

We are not currently using the I2C interface to control the device but instead depend on its default values.

The other PLL outputs are as we expect (#1 at 27MHz, #3 at 148, #4 at 24).

If I do use the I2C interface I can see that register 5 is at its default value of 0x2B, which should be forcing PLL2 to be 148.5MHz.

Probing the board we cannot see any excessive noise.

Cbpy2 sits at about 2.7V

Regards,

James.

  • 0
    TI__Expert 6140 points

    Hi James, 

    Are all the boards power up the same way? Same ramp rate? Can you perform a register dump of good unit vs problematic one? Or better yet, same unit powering up correctly vs a time it comes out with 74 MHz on PLL2. 

    Regards, Amin

  • 0 in reply to Amin Eshraghi
    Prodigy 20 points

    Hi Amin,

    yes they're all powered the same way. Unmodified the ramp rate is ~100us. When we modify the board to give a ramp rate of ~3.5ms the problem is "solved" in that it's not been seen after several thousand power cycles. A register dump is quite hard work on our setup, but could be done. All my experiments have been done on our worst board. I've read several of what I felt were the most important control registers and they were all, for good and bad boots, at their default values as per the data sheet.

    James.

  • 0 in reply to james newman
    TI__Expert 6140 points

    Hi James, 

    I'm glad that changing the supply ramp resulted in the issue not occurring, that seems to indicate that was indeed the problem. Looking over the datasheet, the bit that determines whether PLL2 is at 1/2 the frequency as you were observing is highlighted below, did you monitor this when it occurred during your power cycling? 

    regards, Amin