LMK04832: CLKOut Isolation

Hello Asaf,

Isolation between CLKout pins depends greatly on the output format, the spacing, and the clock group (see Datasheet section 5) to which the outputs are assigned. In general, LVDS/HSDS has the best isolation with differential signaling and 100Ω differential traces; expect better than 70dB isolation between adjacent pins. LVPECL is generally lower isolation than LVDS, and CMOS is significantly worse (even differentially) due to the presence of fast edges which can couple harmonics into nearby outputs. Typically we see about 6dB worse CMOS isolation compared to LVDS, worse if CMOS is single ended, and vastly worse if both CMOS P/N outputs are the same polarity. Additionally, CML is usually high enough frequency that it is uncommon to see in-band spurs; the primary use-case for CML is for direct VCO/clock distribution output, so naturally all other output frequencies are integer multiples of the CML frequency, usually >100MHz. Best practice is to avoid routing sensitive high frequency outputs near lower frequency clocks.

Putting two different frequencies in the same clock group, especially when those frequencies have in-band mixing products, is best avoided when possible, because these outputs can crosstalk directly through a shared power-supply and the crosstalk path is after any in-band LDO attenuation. So for example, CLKout0 could crosstalk severely with CLKout12 if both outputs are at different frequencies, even though they are separated by considerable package distance, because they share a power supply.Continuous SYSREF outputs will typically crosstalk in-band with nearby device clocks, so best practice is to use pulsed SYSREF whenever SYSREF is needed.

Regards,