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LMK04832: CMOS outputs in PD/off state and CLKin input biasing

Richard Mountain51
Prodigy 70 points
Part Number: LMK04832

1)For a given CLKoutY output pair is configured for CMOS - Norm/Norm or Norm/Inv  what is the state of the output pins when the respective CLKoutX_Y_PD bit is set?

2)For a given active CLKoutY output pair, configured for CMOS - Norm/Off or Inv/Off, what is teh state of the 'Off' output driver?   ex high, low, ground, tristate

3) for CLKin0, used deferentially, and DC coupled, is there any data on where the input midpoint, or switching threshold is biased at  (like VCC/2 on CMOS logic) for the MOS and Bipolar modes?

  • 0
    TI__Mastermind 33430 points

    Hello Richard,

    1. When CLKoutX_Y_PD is set, outputs are tri-stated. There appears to be a clamp to about 1.2V high, and a clamp to 0V low.
    2. The "OFF" component of a driver is weakly driven to about 1.5V (thevenin equivalent resistance ~10k).
    3. Input thresholds will vary over PVT, but nominally bipolar is biased to around 1.7V, whereas MOS is biased to around 1.4V. There is also a small amount of hysteresis (<50mV) on the MOS input stage.

    Also, if you are unaware, you may have some use for the SCLKX_Y_DIS_MODE registers and the SYSREF_GBL_PD bit. SCLKX_Y_DIS_MODE can set any SYSREF outputs to active or to Vcm (~1.5V) at any time, and can also conditionally set any SYSREF outputs to Vcm or to GND when SYSREF_GBL_PD bit is set.

    Regards,

  • 0 in reply to Derek Payne
    Prodigy 70 points

    Thanks!

    That was exactly what i needed!

    Respectfully

    Richard