Dear Team,
Customer are looking for clock gen solution with below clock tree.
Input: REF_CLK in 100MHz
Output:
Clock 1: 600MHz (LVPECAL/ need PLL)
Clock 2: 150MHz (LVPECAL/ need PLL)
Clock 3: 100MHz (Pass Trough from REF In)
Please share your suggestion with us. Thanks
Ben
