Fractional spurious level of LMX2594 seems to be higher when the phase synchronization function is turned on (the parameters of I/O frequency, PLL bandwidth, etc. are not changed, only the phase synchronization function is switched). Could you please tell us the cause? When the phase synchronization function is on, the fixed divider (SEG0, SEG1) enters before N Diviser, so the number of divisions of N Divider becomes small and the phase deviation at phase detector input will become relatively large. Is it related to the spurious level?. Are there any other effective measures other than narrowing the loop bandwidth and suppressing it?
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