• State Resolved
  • Locked Locked
  • Replies 8 replies
  • Subscribers 21 subscribers
  • Views 563 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

LMX2491: VCO output clock frequency jitter too high

HanDong
Prodigy 220 points
Part Number: LMX2491


Hi there,

My VCO frequency range is from 24G to 26G. LMX2491 is feeded back by this VCO frequency divided by 16. So around 1600Mhz feedback to LMX2491. I am using 40Mhz OSC (15ppm). And Fpd is 40Mhz.

When I try to generate a stable frequency at 24.6G, I find VCO frequency is 24.6G +- 20Mhz. I monitored the LD signal from LMX2491. I find it is good. always keeping high. So that means the PLL is well locked. My question is how this +-20Mhz is generated? OSC 15PPM  should not bring in such high clock jitter.

any idea what I shoud check further?

Thanks and Best Regards

Dong

  • 0
    TI__Guru** 109600 points

    Hi Han,

    Could you provide your register configuration?

    Could you also provide a screen shot of the VCO output? We want to understand what did you mean by +/-20MHz.

  • 0 in reply to Noel Fung
    Prodigy 220 points

    Hi Fung, 

    Thanks for the response.  See below screen shot. . The hardware is outputing 24.6G for 100ms. Then 24.7G for 100ms. 100Mhz increase per 100ms. I am expecting to see a stable frequecy on every 100 ms. But from the spectrum analyzer, you see the marker1 & 2, they are around 24.6G +- 30Mhz. Marker 3 & 4,  they are around 24.7G +- 20Mhz. 

    here is the register settings:

    R25=1,

    R26 = 0;

    R27=8;

    R28 = 0x1F;

    R29 = 0

    R30 = 0x6

    R31 = 0x2A;

    R32 = 0x0

    R33 = 0x20

    R34 = 0x84

    R16 = 0x26

    R17 = 0x0

    R18 = 0x2C

    R19 = 0x0

    R20 = 0x0

    R21 = 0x70

    R22 = 0xFF

    R23 = 0xFF

    R24 = 0xFF

    R58 = 0

  • 0 in reply to HanDong
    TI__Guru** 109600 points

    Hi Han,

    The register setting looks fine but I think R2 and R0 are required. What is your programming sequence? After Vcc is powered up, we should program all necessary registers in descending order. That is, program start from R34, then R33, R32, ...., R0.

  • 0 in reply to Noel Fung
    Prodigy 220 points

    Hi Fung,

    Thanks. I tuned loop filter bandwidth, the result is gettting better. Looks like my issue most likely is caused by my improper loop filter bandwidth.  One more questions, could you explain a little bit about the relationship between the loop filter bandwidth with RF chrip slope rate? How to judge whether the current chrip slope fits PLL loop filter bandwidth? e.g. if PLL loop filter is 100Khz, could I use chrip slope: 60Mhz in 1.5ms?

    Thanks and Best Regards

    Dong

  • 0 in reply to HanDong
    TI__Guru** 109600 points

    Hi Dong,

    Whenever we change the frequency of a PLL, it takes some little time for the loop to settle down to the new frequency, this is called switching time or lock time. 

    This lock time is inversely proportional to the loop bandwidth. It also depends on the phase margin, gamma factor and of course the amount of frequency jump.  

    In LMX2491, the ramp will jump frequency every 1/fpd cycle. Given fpd = 40MHz, the ramp will change frequency every 25ns. There will be 60000 frequency jumps in 1.5ms. Each frequency jump is 1kHz. 

    Although the jump size is only 1kHz, but it has to be finished within 25ns. The lock time is approximately equal to 4/Loop bandwidth. I expect the loop bandwidth will has to be at least 4MHz.

    I suggest reduce the number of frequency jump to 30000 by making RAMPx_DLY = 1 and reduce the phase detector frequency so as to relax the pressure on loop bandwidth.

  • 0 in reply to Noel Fung
    Prodigy 220 points

    Thanks. Fung.

    If the loop bandwidth is 4Mhz, based on that formular, the lock time is around 1us.  Still far from 25ns. So how is this 4Mhz determined? because of 1Khz jump is small? 

    Best Regards

    Dong

  • 0 in reply to HanDong
    TI__Guru** 109600 points

    Hi Dong,

    Yes, because the frequency jump is very small, it won't take 1µs to go to the new frequency.

  • 0 in reply to Noel Fung
    Prodigy 220 points

    Thanks a lot for the explaination. Fung. Got it.