I have 20 ADCs to process parallel output Data.
On my design I used one core clock and clock buffers to fan out the core clock to each ADC (source-synchronous clock).
If there is any better scheme to realize this parallel processing?
Thanks.
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I have 20 ADCs to process parallel output Data.
On my design I used one core clock and clock buffers to fan out the core clock to each ADC (source-synchronous clock).
If there is any better scheme to realize this parallel processing?
Thanks.